Oki Semiconductor Co., Ltd.

Oki Electric Industry Co., Ltd.

Kabushiki Kaisha Sega Enterprises

Sega Corporation

Takashi Yuda

Kenjiro Morimoto

Takumi Yoshinaga

Hitoshi Nakanishi

Misaqa Kitamura

There is provided a semiconductor non-volatile memory including: plural memory sections, a voltage application section, and a control section that controls the voltage application section wherein the control section controlling voltage application such that, based on a value of current detected by a current detection section, in a region where the current flowing in a channel region is greater than a predetermined target value at which a amount of charge accumulated has become a specific value in at least one of a first charge accumulating section or a second charge accumulating section, when a value of current flowing in the channel region approaches a target value, a rate of increase in the charge accumulating amount per time is decreased at least once.

Semiconductor non-volatile memory, charge accumulating method for semiconductor non-volatile memory, charge accumulating program storage medium

A method having the steps of applying the same gate voltage to each of gate terminals of a plurality of memory cells via word lines to designate the memory cells as a write target, and simultaneously applying a write voltage that corresponds to each write data across drain-source terminals of two or more memory cells that are write targets via bit lines to write simultaneously a plurality of data elements having mutually different data values to the memory cells.

Nonvolatile semiconductor memory and data writing method for nonvolatile semiconductor memory

An object is to provide a program for a game apparatus for making a plurality of moving objects including a moving object operated by a player to compete in virtual space against each other, in which players are capable of fully using the stage effects specific to a virtual game to enjoy a heated racing game even when they vary in skill. In a program for a game apparatus comprising moving-object operating means, image-information generating means, and image-information outputting means, the program causes a computer to perform a step of producing land-configuration information, a step of monitoring movement information regarding a plurality of moving objects, a step of producing a special area object when results of monitoring meet predetermined requirements, a step of displaying the special area object in such a manner as to be viewable for the player, and a step of allowing another moving object to ride therein.

Program for game apparatus, game apparatus, and recording medium storing program for game apparatus

The present invention provides a semiconductor device which includes a gate electrode shaped in the form of an approximately quadrangular prism, including a laminated body of a gate oxide layer, a gate polysilicon layer and a gate silicon nitride layer provided in a first conduction type substrate, a second conduction type implantation region provided in a region outside the gate electrode, a sidewall that exposes a top face of the gate electrode and is formed by laminating a sidewall mask oxide layer covering side surfaces, an electron storage nitride layer and a sidewall silicon oxide layer, and a source/drain diffusion layer provided in the first conduction type substrate exposed from the gate electrode and the sidewall.

Semiconductor device comprising multi-layer rectangular gate electrode surrounded on four sides by sidewall spacer and implantation regions

A MONOS type non-volatile semiconductor memory device has a memory cell array. The memory cell array includes a plurality of pairs of bit line and control line. These bit line-control line pairs are parallel to the channel on the substrate. The memory cell array also includes a plurality of memory cells. Each memory cell has a two-transistor configuration. A certain number of memory cells are disposed between the bit line and control line of each pair. These memory cells are connected in series, and connected with the bit line and control line alternately. The first gate electrode and second gate electrode in the memory cell are formed in strips in a direction perpendicular to the channel.

Non-volatile semiconductor memory device, drive method and manufacturing method

A semiconductor nonvolatile memory has a memory cell array in which each memory cell has a pair of charge traps and each charge trap stores data with at least three possible values. Different data values produce different read current values. To store data, a controller and a voltage supplying unit in the semiconductor nonvolatile memory successively program and verify the charge traps that require programming, using higher programming voltages for data values that must produce lower read currents. This operation is iterated on the charge traps that have not yet attained their necessary read current values, until no such charge traps remain. The programming voltages are set so that all charge traps require substantially the same number of programming iterations, regardless of the data being stored.

Method of programming a semiconductor nonvolatile memory cell and memory with multiple charge traps

Source diffusion layers and drain diffusion layers are alternately formed in lateral device forming regions separated by device isolation regions. Control gate electrodes are formed on both sides of each source diffusion layer through gate ONO films interposed therebetween. Gate electrodes are formed over their corresponding side surfaces of the control gate electrodes through inter-gate electrode insulating films interposed therebetween respectively. The control gate electrodes and the gate electrodes are respectively connected in a vertical direction by a source line and word lines on each device isolation region. Further, an intermediate insulating film is formed over the surface of a silicon substrate formed with memory cells, and each lateral drain diffusion layer is connected to a bit line through contacts.

Growing community of inventors

Tokyo, Japan

Takashi Yuda