Kabushiki Kaisha Toshiba

Takashi Yoshitomi

Hiroshi Iwai

Masanobu Saito

Mizuki Ono

Hisayo S Momose

Tatsuya Ohguro

Shinichi Nakamura

Yukihiro Ushiku

Satoshi Matsuda

Yasushi Akasaka

Yasuhiro Katsumata

Hideaki Nii

Takashi Yamaguchi

Masahiro Inohara

Yuichi Nakashima

Masahiko Matsumoto

Ryoji Hasumi

Hideki Kimijima

Claudio Fiegna

Tatsuya Ooguro

A semiconductor device comprises: a p-type semiconductor substrate (); an insulating film (); a gate electrode () formed an the substrate via the insulating film; and an n-type source/drain region () formed on both sides of a channel forming region () located under the gate electrode () formed on the substrate (). In particular, the thickness (T) of the insulating film () is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (L) of the gate electrode () is determined to be equal to or less than 0.3 &#x3bc;m; and further a voltage applied to the gate electrode () and the drain region () is determined a be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.

MOSFET with a thin gate insulating film

At present, Cu (copper) is being used as a wiring material. In an RF-CMOS device as a combination of an RF analog device and CMOS logic device, two electrodes of a MIM capacitor are formed from Cu having a large diffusion coefficient. To prevent Cu from diffusing to the capacitor insulating film of the MIM capacitor, diffusion prevention films having a function of preventing diffusion of Cu are interposed between the capacitor insulating film and the two electrodes. As a result, Cu forming the electrodes does not diffuse to the capacitor insulating film.

MIM capacitor having flat diffusion prevention films

A semiconductor device, comprising a first wiring formed in a first insulating film, a second insulating film formed on the first insulating film, a first electrode film selectively formed on the second insulating film, a third insulating film formed on the first electrode film, and having an end portion and a central portion, wherein the end portion has a thickness thinner than the central portion, a second electrode film formed on the central portion of the third insulating film such that the second electrode film faces the first electrode film.

Semiconductor device having capacitor and method of manufacturing the same

A semiconductor device comprises: a p-type semiconductor substrate (); an insulating film (); a gate electrode () formed on the substrate via the insulating film; and an n-type source/drain region () formed on both sides of a channel forming region () located under the gate electrode () formed on the substrate (). In particular, the thickness (T) of the insulating film () is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (L) of the gate electrode () is determined to be equal to or less than 0.3 &#x3bc;m; and further a voltage applied to the gate electrode () and the drain region () is determined to be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.

A process of manufacturing a semiconductor device. The initial process steps are forming a first insulating film above a semiconductor substrate and removing a selected portion of the first insulating film to form an opening. The next step is depositing a first electrode, a dielectric film and a second electrode successively on a bottom portion of the opening, The deposits being oriented such that they are in substantially parallel relationship with a surface of the semiconductor substrate. The final steps are removing selected portions of the first electrode, the dielectric film and the second electrode, forming a capacitor at a selected position in the opening, forming a second insulating film at least in the opening, and forming a third insulating film on the second insulating film.

MIM capacitor with diffusion barrier

A semiconductor device includes a first electrode film, first and second electrode films, first and second connection parts, first and second wirings, and a protective insulating film. The second electrode film opposes the first electrode film. The capacitor insulating film is provided between the first electrode film and the second electrode film. The first and second connection parts are electrically connected to the first and second electrode films, respectively. The first wiring is electrically connected to the first electrode film by the first connection part. The second wiring is electrically connected to the second electrode film by the second connection part. The protective insulating film is provided between the capacitor insulating film and the second electrode film or on the second electrode film.

Semiconductor device having capacitors provided with protective insulating film

A semiconductor device comprises: a p-type semiconductor substrate ( ); an insulating film ( ); a gate electrode ( ) formed on the substrata via the insulating film; and an n-type source/drain region ( ) formed on both sides of a channel forming region ( ) located under the gate electrode ( ) formed on the substrate ( ). In particular, the thickness (T ) of the insulating film ( ) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (L ) of the gate electrode ( ) is determined to be equal to or lass than 0.3 &mgr;m; and further a voltage applied to the gate electrode ( ) and the drain region ( ) is determined to be 1.3 V or less. Therefore, in the MOSFET having the tunneling gate oxide film ( ), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.

A semiconductor device includes a first insulating film comprising an opening, a capacitor formed at a selected position in the opening, a second insulating film formed at least in the opening, and a third insulating film formed on the second insulating film.

Semiconductor device with capacitor and process for manufacturing the device

A semiconductor device comprises: a p-type semiconductor substrate ( ); an insulating film ( ); a gate electrode ( ) formed on the substrate via the insulating film; and an n-type source/drain region ( ) formed on both sides of a channel forming region ( ) located under the gate electrode ( ) formed on the substrate ( ). In particular, the thickness (T ) of the insulating film ( ) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (L ) of the gate electrode ( ) is determined to be equal to or less than 0.3 &mgr;m; and further a voltage applied to the gate electrode ( ) and the drain region ( ) is determined to be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film ( ), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.

A semiconductor device comprises: a p-type semiconductor substrate (,); an insulating film (,); a gate electrode (,) formed on the substrate via the insulating film; and an n-type source/drain region (,) formed on both sides of a channel forming region (,) located under the gate electrode (,) formed on the substrate (,). In particular, the thickness (T,) of the insulating film (,) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (L,) of the electrode (,) is determined to be equal to or less than 0.3 &mgr;m; and further a voltage applied to the gate electrode (,) and the drain region (,) is determined to be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (,), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.

The capacitor dielectric film (35) and the poly silicon layer (36) are formed on the silicide film (32) of the upper electrode LE of the capacitor. Further, after the Ti and TiN layer (37) has been formed on the poly silicon layer (36) by spattering, the formed Ti and TiN layer (37) is allowed to react upon the poly silicon layer (36), to form the TiSi.sub.2 layer (38) of high melting point silicide film on the poly silicon layer (36). After that, before forming the barrier layer (40) and the wiring layer (42), the substrate (10) is cleaned as pre-processing by applying a voltage to the substrate (10). In this cleaning process, since the capacitor dielectric film (35) is protected by the TiSi.sub.2 layer (38) of high melting point silicide film, it is possible to prevent the capacitor dielectric film (35) from being damaged during the cleaning process.

Semiconductor device having MIS transistors and capacitor

A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed on the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (T.sub.OX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (L.sub.g) of the gate electrode (2) is determined to be equal to or less than 0.3 .mu.m; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined to be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.

A semiconductor device capable of restraining a short channel effect and obtaining a current drivability that is as high as possible includes a semiconductor substrate, a gate insulating film formed on the surface of this substrate, a gate electrode formed on this gate insulating film and side wall insulating films formed on this gate electrode and along side walls of the gate insulating film. The semiconductor device further includes side wall conductor films formed adjacent to the side wall insulating films and a source/drain region formed in a surface region of the substrate under the side wall conductivity film and in a surface region, adjacent to the side wall conductivity film, of the semiconductor substrate. An impurity concentration in a depthwise direction of the substrate with the surface of the side wall conductor film serving as a starting point exhibits one maximum value in a predetermined depth but decreases in a portion deeper than the predetermined depth.

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Kamakura, Japan

Takashi Yoshitomi