Kabushiki Kaisha Toshiba

Ricoh Company, Ltd.

Sony Corporation

Matsushita Electric Industrial Co., Ltd.

Nissan Motor Company Limited

Sony Corpotation

Takashi Yoshikawa

Shigehiro Asano

Toru Matsuda

Yutaka Yamada

Hiroaki Suzuki

Hiroo Kitagawa

Teruyuki Maruyama

Masayoshi Miyamoto

Kiyoshi Suzuki

Hideyuki Watanabe

Sachiko Takeuchi

Tatsunori Kanai

Takeshi Hamamoto

Takashi Nakamura

Yuichi Araumi

Tatsuo Miyachi

Shigeo Kobayashi

Tatsuya Inagaki

Hiroyuki Kinbara

Noriko Horibata

Seiichi Watanabe

Takuya Inoue

Junichi Segawa

Yoshio Ishigaki

Keiji Fukuzawa

Masayoshi Tsuchiya

Takahiro Kurosawa

Tatsuo Ito

Hiroshi Kakii

Yohei Hasegawa

Mikio Nozaki

Shinobu Tsurumaru

Takahiko Uno

Nobuaki Yokoyama

Haruo Ishikawa

Koji Ouchi

Hiroki Wada

Kazuhiro Imai

Sachiko Mihira

Anna Hayashi

Tomoya Kamada

Ko Honma

Kiyoshi Kawana

Yorimichi Taguchi

A mounting structure for a power conversion device includes: a vehicle body component extending in a front-rear direction of a vehicle; a mounting component provided on the vehicle body component; a drive unit held by the vehicle body component via the mounting component; and a power conversion device attached to the mounting component. A stiffness of the mounting component is greater than a stiffness of the vehicle body component. The power conversion device is arranged between a front end and a rear end of the drive unit in a side view of the vehicle.

Mounting structure for power conversion device

An information processing device according to an embodiment includes a storage device and one or more processors configured to function as a setting unit and a record control unit. The setting unit sets a record level of history information according to a reliability of derivative information derived from output information of a sensor. The record control unit performs control to store the history information in the storage device according to the record level.

Information processing device, information processing method, computer program product, and moving object

An image processing apparatus serving as a master device and a plurality of local image processing apparatus serving as local devices are connected to one another via a network, and each of the devices includes an authentication information storage unit and an authentication unit. The master device stores, as master authentication information, authentication information necessary for an authentication on each of users who are able to use each of the devices, for each of the devices, and allows editing of the master authentication information. When the authentication information on the local device in the master authentication information is edited, the edited authentication information is transmitted to the local device, and the authentication information stored in local device is updated. When a user login operation is performed on the local device, an authentication is performed by using the authentication information in the local device.

Image processing apparatus authentication system and image processing apparatus

A print control apparatus includes a generating unit that generates clear-toner plane data based on gloss-control plane data, which contains a gloss control value for specifying a type of a surface effect being a visual or a tactile effect applied to the recording medium and for specifying a region to which the surface effect is applied in the recording medium, and clear plane data, which contains a density value for specifying a transparent image other than the surface effect; and an outputting unit that outputs the clear-toner plane data. When a region where the gloss control value is specified in the gloss-control plane data and a region where the density value is specified in the clear plane data overlap each other, the generating unit sets a value of the clear-toner plane data to the gloss control value or the density value, based on a predetermined condition.

Print control apparatus, printing system, and print control method

A semiconductor device performs operation in synchronization with a certain clock signal. The semiconductor device includes a control unit for outputting operation control information, a storage unit for storing data, a first operation unit for performing operation on first data in accordance with first operation control information, and a second operation unit for performing operation on second data in accordance with second operation control information. The first operation unit includes a plurality of operation circuits. The number of logic gates constituting the entire operation circuits is m. The second operation unit includes at least one operation circuit in which the number of logic gates is n (n&#x3e;m). Each of the total delay of the operation unit or the total delay of the operation unit is set at a value equal to or less than the cycle of the clock signal.

Semiconductor device

A semiconductor device includes a first arithmetic engine which executes a first arithmetic process in every cycle and outputs first data representing the result of the first arithmetic process and a first valid signal representing a first or second value in every cycle, and a second arithmetic engine which executes a second arithmetic process in every cycle and outputs second data representing the result of the second arithmetic process and a second valid signal representing the first or second value in every cycle. The device also includes an inter-arithmetic-engine buffer which is used to exchange the first data and the second data between the first and second arithmetic engines, enables write of the first or second data if the first or second valid signal indicates the first value, and inhibits write of the first or second data if the first or second valid signal indicates the second value.

A semiconductor device includes a first circuit that executes a first calculation, a second circuit that includes a first storage unit therein and executes a second calculation, a controller that outputs a first address for specifying a first execution circuit for the first calculation and a second execution circuit for the second calculation, to the first circuit and the second circuit, and controls input of data into the first circuit, and a bus that transfers a result of the first calculation executed by the first circuit to the second circuit, wherein the result of the first calculation can be conditionally used as an address for specifying the second execution circuit.

Selecting configuration memory address for execution circuit conditionally based on input address or computation result of preceding execution circuit as address

The semiconductor device includes a controller and a plurality of dynamically reconfigurable circuits connected to one another in series below the controller to perform operations in the manner of a pipeline. The controller inputs data and reconfiguration information to the first one of the dynamically reconfigurable circuits. Each of the dynamically reconfigurable circuits includes a processing unit that performs a data computation, an updating unit that updates the reconfiguration information, and a repetition controlling unit that determines whether to repeat the computation and controls the data and the reconfiguration information.

Semiconductor device and data processing method performed by semiconductor device to perform a repeat operation within a reconfigurable pipeline

In an image forming apparatus, a delivery instruction receiving part receives a delivery instruction for instructing a delivery form a request originator, and a delivering part delivers data indicated by a delivery instruction description in accordance with the delivery instruction indicated by the delivery instruction by a deliver type indicated by the deliver instruction description, so that delivery processes corresponding to a plurality of different delivery types can be conducted. The delivery instruction description is written in a form which can be shared and used for the plurality of different delivery types.

Image forming apparatus, image forming method, and information processing apparatus

A plurality of operation units connected in a pipeline structure performs an operation processing on data. A process control unit operates in synchronization with a system clock signal and generates a process control signal for controlling the operation units upon receiving a data notification signal that notifies the process control unit of an arrival of data from outside. A clock-control signal generating unit operates in synchronization with the system clock signal and generates a clock control signal for controlling a clock supply to each of the operation units upon receiving the process control signal.

Semiconductor integrated circuit device and clock control method

An image processing apparatus for executing a process based on a count available for each group is disclosed, including: a remaining count acquisition part acquiring a remaining count available for a group to which a user authenticated by a user ID belongs, from a count management server which manages the count for each group.

Image processing apparatus, count management server, and count management method

A semiconductor device includes a plurality of operating units, a controller that controls the plurality of operating units according to predetermined state transition, a first storage that stores data to be processed, a second storage that stores circuit information specifying an operation process performed in the plurality of operating units, a third storage that stores data access information for the first storage and a pointer for the second storage in association with a state of the controller. The controller reads an address and the pointer stored in the third storage according to the state, and transmits the circuit information stored in a region of the second storage specified by the read pointer to the plurality of operating units.

An apparatus, method, system, computer program and product are disclosed, each capable of managing a configuration request received via a network. Upon receiving a configuration right request form a client, a determination is made as to whether or not a configuration right can be issued. Based on the determination, the configuration right is issued to the client.

Managing configuration request received via network

Growing community of inventors

Kanagawa, Japan

Takashi Yoshikawa