Hitachi, Ltd.

Hitachi Ulsi Systems Co., Ltd.

Hitachi-omron Terminal Solutions, Corporation

Other

Panasonic Liquid Crystal Display Co., Ltd.

Hitachi Displays, Ltd.

Takashi Watanabe

Takashi Endo

Masahiro Kaminaga

Masaru Ohki

Kunihiko Nakada

Toshio Okochi

Takashi Tsukamoto

Hiroshi Sako

Tatsuya Kameyama

Hiroto Nagayoshi

Toshiro Uemura

Shunsuke Ota

Hiroshi Kageyama

Futoshi Furuta

Fumiaki Komori

Yuuichirou Nariyoshi

Chiaki Tanimoto

Seiichi Kumano

Noboru Kataoka

To realize a random number generating circuit that is optimum for a liquid crystal display device that is used in a terminal device that includes a display/input component. A liquid crystal display device includes a liquid crystal display panel, a control circuit and a random number generating circuit, the random number generating circuit comprises plural shift registers, an output circuit and a register that stores an initial value, and the random number generating circuit is equipped with plural initial values, whereby the randomness of the random numbers is improved. Further, it becomes possible to increase and output frequencies by the output circuit because it is possible to output respectively different random numbers from the plural shift registers.

Display device

In order to prevent interception of the information through the leakage electromagnetic waves when transmitting the information using an image display unit, an image converter generates plural converted images, stores the generated converted images in an image storage, an image output unit reads out the converted images from the image storage and transmits the converted images to a screen control unit successively. The screen control unit displays a reception image on an image display unit. The image output unit outputs the converted image group at a high speed, thereby performing a switching display on the image display unit, and to show an image visually equivalent to the input image.

Information display device and information display method

In order to prevent interception of information through leakage electromagnetic waves when transmitting the information using an image display unit, an image converter generates plural converted images, stores the generated converted images in an image storage, an image output unit reads out the converted images from the image storage and transmits the converted images to a screen control unit successively. The screen control unit displays a reception image on an image display unit. The image output unit outputs the converted image group at a high speed, thereby performing a switching display on the image display unit, and shows an image visually equivalent to the input image.

An increase in safety from attacks by use of hardware-like methods by small-sized hardware is achieved. An encryption processing device includes a logical circuit capable of programmably setting logics for executing cipher processing, a memory that stores plural pieces of logical configuration information corresponding to an identical cipher processing algorithm, and a CPU that selectively sets plural logics corresponding to an identical cipher processing algorithm in the logical circuit. Even in processing using an identical cipher key, by changing the logic of the logical circuit for each processing, power consumption in cipher processing can be varied, and places a timing in which malfunctions occur can be varied. Moreover, an increase in the scale of hardware for realizing plural logics can be curbed.

Encryption processing method and encryption processing device

A program to be executed by a computer is divided into a plurality of code blocks, and, a unique code block ID is allotted to each code block. At the moment when the execution of the program is started, the code block ID corresponding to the execution start address is written in a memory, and in the case when the control transits from the code block to other code block, by use of code block operation values obtained beforehand from these two code block IDs thereof, the code block ID in the memory is updated, and it is judged whether the updated code block ID in the memory and the code block ID allotted to the code block as the execution objective are identical or not so that a control flow error is detected.

Method and apparatus for detecting false operation of computer

A malfunction detection system is provided that can continue or terminate processing appropriately even if a malfunction occurs in an information processing unit. In this regard, the information processing unit receives branch direction information, carries out a conditional branch depending on the branch direction information, and performs an applicable operation on data I. At this time, the information processing unit performs an applicable operation on data J, other than the operated data I, in the conditional branch path and outputs the result for examination, thereby enabling validation of the conditional branch.

Information processing unit having tamper-resistant system

An information processing unit and methods therefore which render it more difficult to infer information being processed within an information processing unit by observing the unit's current consumption or electromagnetic radiation. Specifically, the information processing unit preferably encrypts and decrypts data when the data is read from/written to memories within the unit. The encryption/decryption process may include the use of multiple cryptographic keys, permutated data storage locations, randomly generated keys, and permutated data processing steps.

Information processing unit

The subject of the disclosed technology is, when a crypto-processing is performed utilizing an information processing device buried in an IC card, etc., to decrease the relationship between the waveform of the consumption current and the contents of the crypto-processing as a countermeasure against a tamper which observes the waveform of a consumption current. A solution means is shown in the following. When a decryption processing of an RSA cryptogram is performed according to CRT, in stepfor every unit bit block of XP a modular exponentiation calculation is performed, and the partial result of CP up to the calculated bit block is stored in a memory. In stepfor every unit bit block of XQ a modular exponentiation calculation is performed and the partial result of CQ up to the calculated bit block is stored in a memory. In stepa random number is generated, and in stepit is decided that stepis to be executed or stepis to be executed corresponding to the value of the random number.

Tamper-resistant processing method

An object of the present invention is to prevent secret information that is being internally processed from being inferred through operational information of a secured device, including the current consumption information. One solution is provided by an information processing device having at least a key generation apparatus that generates key data automatically, an encryption unit that encrypts data with the corresponding key data, a register that stores a plurality of encrypted data items with the corresponding encryption key data items, and an arithmetic unit that performs operations using data expressed with the corresponding encryption key data and new key data as the input, encrypts the operation result with new input key data, and outputs the result, thereby being capable of performing internal processing on an encrypted data expression. Accordingly, only encrypted data is transferred on the internal or external data bus line.

Information processing device

The present invention makes it difficult for unauthorized parties to estimate processing and a secret key based upon the waveforms of power consumption of an IC card chip by changing a processing order in the IC card chip so that it is not estimated by the attackers. In an information processing apparatus comprising storing means having a program storing part for storing programs and a data storing part for storing data, an operation processing unit, means for inputting data to be operated on in the operation processing unit, and means for outputting operation processing results on the data by the operation processing unit, an arithmetic operation method is provided which comprises the steps of: for two integers Kand K, when finding a value F(K, A) of a function F satisfying F(K+K, A)=F(K, A)&#x25ef;F(K, A) (&#x25ef; denotes an arithmetic operation in a communtative semigroup S. K designates an integer and A designates an element of S), decomposing the K to the sum of m integers K[]+K[]+ . . . K[m&#x2212;1]; using T(), T(), . . . T(m&#x2212;1) resulting from rearranging a string of the m integers 0, 1, . . . m&#x2212;1 by permutation T (the result corresponds one for one to the integer string 0, 1, . . . m&#x2212;1); and operating on terms F(K[T()], A) to F(K[T(m&#x2212;1)], A) on the right side of()=(()],)&#x25ef;(()],)&#x25ef; . . .((&#x2212;1)],) . . . &#x2003;&#x2003;(expression 1)in the order of F(K[T()], A), F(K[T()], A), . . . F(K[T(m&#x2212;1)], A) to find F(K, A).

Attack-resistant implementation method

The disclosed technology of the present invention relates to an information processing device such as an IC card, and specifically to the overflow processing which occurs in a modular multiplication operation during crypto-processing. Such overflow processing exhibits a particular pattern of consumption current. It is the subject of the present invention to decrease the relationship between the data processing and the pattern of the consumption current. In the processing procedures for performing a modular exponentiation operation according to the 2 bit addition chain method, the modular multiplication operation to be executed is selected at random, the selected modular multiplication operation is executed for each 2 bits, the correction of the result is performed, and the result of the calculation (i.e, a corrected value or uncorrected value) is outputted.

Tamper-resistant modular multiplication method

A tamper-resistant information device for use with IC cards, etc. having high security. The tamper-resistant information device has an input unit for inputting a signal, a storage unit for storing a program, an operation unit for performing predetermined data processing according to a program, and an output unit for outputting a signal. The program stored in the above storage unit includes one or more data processing instructions giving an execution direction to the operation unit. When the signal input from the above data inputting unit is subjected to data processing, at least one of the above data processing instructions instructs an operation on a signal A and a signal B to be performed, where the signal B is used for a given calculation in data processing, the above operation including the steps of: arbitrarily dividing the signal A or B into pieces; performing a given operation on each piece of the divided signal and on the remaining undivided signal, separately; and adding all the operation results to obtain the proper encrypted signal.

Growing community of inventors

Kokubunji, Japan

Takashi Watanabe