Kabushiki Kaisha Nihon Micronics

Guala Technology Co., Ltd.

Takashi Tonokawa

Yuki Sato

Kazuyuki Tsunokuni

Tatsuo Inoue

Takuo Kudoh

Hikaru Takano

Akira Nakazawa

Kiyoyasu Hiwada

Tomokazu Saito

Shigefusa Chichibu

Harutada Dewa

Kazunobu Kojima

Tomokazu Saitoh

Yutaka Kosaka

Juri Ogasawara

A secondary battery includes: a first oxide semiconductor having a first conductivity type; a first charging layer disposed on the first oxide semiconductor layer, and composed by including a first insulating material and a second oxide semiconductor having the first conductivity type; a second charging layer disposed on the first charging layer; a third oxide semiconductor layer having a second conductivity type disposed on the second charging layer; and a hydroxide layer disposed between the first charging layer and the third oxide semiconductor layer, and containing a hydroxide of a metal constituting the third oxide semiconductor layer. The highly reliable secondary battery is capable of improving an energy density and increasing battery characteristics (electricity accumulation capacity).

Secondary battery

A secondary battery according to the present invention includes a first electrode, a second electrode, a charging layer arranged between the first electrode () and the second electrode and containing a mixture of an insulating material and a first n-type oxide semiconductor material, an n-type oxide semiconductor layer arranged between the charging layer and the first electrode and containing a second n-type oxide semiconductor material, a p-type oxide semiconductor layer () arranged between the charging layer and the second electrode and containing a p-type oxide semiconductor material, a mixture layer arranged between the charging layer and the p-type oxide semiconductor layer and containing a mixture of silicon oxide and a third n-type oxide semiconductor material, and a conductive layer arranged between the first electrode and the n-type oxide semiconductor layer and containing a metal material.

A method for manufacturing oxide semiconductor secondary cells concurrently and evenly on a plurality of chips. A method for manufacturing a chip on which an oxide semiconductor secondary cell is mounted, the oxide semiconductor secondary cell that is formed by layering a first electrode, a charging function layer, and a second electrode being layered on a circuit. The method includes a layering process to layer and form the oxide semiconductor secondary cells integrally at regions corresponding to a plurality of chips formed on a wafer without separately forming oxide semiconductor secondary cells at regions corresponding to the respective chips, and a separating process to perform separation into individual oxide semiconductor secondary cells corresponding to the respective chips by performing pattern etching on the integrally-formed oxide semiconductor secondary cells to eliminate regions not corresponding to the respective chips except for regions corresponding to the respective chips.

Secondary battery mounted chip manufacturing method

A secondary battery-mounted circuit chip wherein secondary battery is directly fabricated on opposed surface of formed circuit into an integrated structure of the secondary battery and circuit, and a manufacturing method thereof. Secondary battery-mounted circuit chip is configured such that secondary battery is directly fabricated in region corresponding to circuit into integrated structure of secondary battery and circuit. The chip is secondary battery-mounted circuit chip wherein secondary battery is formed on surface opposing a circuit region fabricated on wafer. Secondary battery and circuit are formed into integrated structure by forming the uppermost part of circuit having multilayer wiring into secondary battery structure on upper part of circuit surface subjected to passivation, forming secondary battery directly stacked by making uppermost wiring layer of multilayer wiring part of circuit in a surface structure to be used in common, or forming secondary battery on rear surface of substrate having the circuit formed thereon.

Secondary battery-mounted circuit chip and manufacturing method thereof

Growing community of inventors

Tokyo, Japan

Takashi Tonokawa