Oki Electric Industry Co., Ltd.

Kabushiki Kaisha Toshiba

Oki Semiconductor Co., Ltd.

Takashi Taguchi

Satoshi Machida

Sachiko Yabe

Tetsuro Itakura

Toshiyuki Nakamura

Suguru Sasaki

Noboru Uchida

Minoru Watanabe

Takeshi Shima

Hiroyuki Ideno

Kazutoshi Abe

Hiroshi Ohtsuka

An output circuit which outputs an output signal based on an input signal from an output terminal and brings the output terminal into a high impedance state in response to an impedance control signal. The output circuit includes an output pMOS transistor connected at a source thereof to a first power supply. The output circuit includes an output nMOS transistor connected between a drain of the output pMOS transistor and ground. The output circuit includes an output terminal connected between the drain of the output pMOS transistor and a drain of the output nMOS transistor. The output circuit includes a first level shifter circuit which outputs a first gate control signal from a first gate control terminal to control on/off of the output pMOS transistor. The output circuit includes a second level shifter circuit which outputs a second gate control signal from a second gate control terminal to control on/off of the output nMOS transistor.

Output circuit and output control system

A semiconductor device has a transparent dielectric substrate such as a sapphire substrate. To enable fabrication equipment to detect the presence of the substrate optically, the back surface of the substrate is coated with a triple-layer light-reflecting film, preferably a film in which a silicon oxide or silicon nitride layer is sandwiched between polycrystalline silicon layers. This structure provides high reflectance with a combined film thickness of less than half a micrometer.

Fabrication method for device structure having transparent dielectric substrate

Dielectric substrate with reflecting films

A semiconductor integrated circuit is fabricated in a substrate having a semiconductor layer and an underlying insulator layer. The fabrication process includes a step of locally oxidizing the semiconductor layer to form a field oxide, during which step the semiconductor layer is protected by a nitride film. The nitride film has both openings to permit local oxidization in the integrated circuit area, and an opening defining an alignment mark adjacent to the circuit area. The alignment mark may be formed either in the semiconductor and insulator layers, or in a part of the nitride film left after the nitride film is removed from the circuit area. In either case, the edge height of the alignment mark is not limited by the thickness of the semiconductor layer. Using the nitride layer to define both the alignment mark and the field oxide reduces the necessary number of fabrication steps.

Method of forming alignment marks for semiconductor device fabrication

A method of forming a linear grating is disclosed. When forming a first resist pattern covering certain surface regions of a substrate, the mask pattern position is shifted and the first resist pattern is formed such that the trench in the target region is completely filled with the first resist pattern even when an error in positioning occurs. The surface of the first resist pattern is etched, and a lower resist pattern is left to the same level as the uppermost step of the silicon substrate. On top of this, an upper resist pattern having the same pattern as the first resist pattern is formed. At this time, the mask pattern position is shifted and the exposure dose is adjusted such that one edge of the upper resist pattern is positioned on the lower resist pattern, and the other edge is positioned in a prescribed region border portion. The lower resist pattern and upper resist pattern are used as a mask to etch the silicon substrate.

Linear grating formation method

A semiconductor device comprises a semiconductor substrate having a first surface and a second surface, and a first multilayer laminated structure film which is formed in the first surface of the semiconductor substrate and has a first layer having a first refractive index, a second layer formed on the first layer and having a second refractive index lower than the first refractive index, and a third layer formed on the second layer and having a third refractive index higher than the second refractive index, and in which the thicknesses of the respective layers are respectively thicknesses calculated by (2N+1)&#x3bb;/(4n) where the wavelength of light used for detecting the first multilayer laminated structure film is defined as &#x3bb;, the refractive indices of the respective layers are defined as n, and N is defined as 0 or a natural number.

Semiconductor device and semiconductor wafer

A method for manufacturing a microlens formed on a semiconductor substrate includes the steps of preparing the semiconductor substrate, forming an insulating film, which has high etching selectivity with the semiconductor substrate, on the semiconductor substrate, forming a first resist layer, which has an opening that exposes a part of the insulating film, on the insulating film, forming a lens forming portion by eliminating a part of the insulting film, using the first resist layer as a mask, forming a second resist layer, which has roughly cylindrical shape, on the lens forming portion surrounded by the insulating film, transforming the second resist layer into a third resist layer that has roughly hemispheric shape by reflowing the second resist later with a heat treatment, and forming a lens on the semiconductor substrate by etching the third resist layer, the semiconductor substrate, and the insulating film simultaneously with anisotropic etching.

Method for manufacturing a microlens

A silicon-on-insulator (SOI) substrate has a grid-line region and a circuit region, and includes a silicon substrate having an upper surface, a first insulating layer having an upper surface and a silicon layer, and which has a grid-line region zoning a circuit region. An element isolation region is formed in the silicon layer of the circuit region of the SOI substrate, and an insulating region is formed in the silicon layer of the grid-line region of the SOI substrate. The insulating region and a portion of the first insulating layer located under the insulating region are removed to define a recess in the grid-line region.

Method of manufacturing an alignment mark

A D/A conversion circuit which can perform D/A conversion at high speed and with high precision is disclosed. The D/A conversion circuit comprises an analog reference power supply, an output buffer, a multiplexer, a pre-buffer, and a current changeover switch. The pre-buffer operates with a power supply voltage different from that of the analog reference power supply, and outputs a voltage substantially equal to an output voltage of the analog reference power supply. For a predetermined period after logic of digital data changes, the output voltage of the pre-buffer is supplied to the output buffer, and an input parasitic capacitor of the output buffer is charged/discharged. After the predetermined period elapses, the output voltage of the analog reference power supply is supplied to the output buffer. Therefore, a charging/discharging current of the input parasitic capacitor does not flow through the analog reference power supply, and fluctuation of the output voltage of the analog reference power supply can be suppressed.

D/A conversion circuit and liquid crystal display device

Attenuated phase-shift mask and method of manufacturing the same

A liquid crystal display device significantly reduces power consumption and causes no signal delay when a liquid crystal panel performs an inversion-type drive. The liquid crystal display device comprises a digital controller, a level shift circuit, a digital-to-analog (D/A) converter, a liquid crystal panel, and a plurality of capacitors. In the D/A converter, a charging control circuit is provided corresponding to each capacitor. The charging control circuit comprises a switch, a diode and an inverter, the switch and the diode being coupled in parallel. The switch is turned on and off in response to a switching signal from the digital controller. The switch is changed to a turning- on state during a blanking period after one horizontal displaying. Upon turning-on of the switch, the capacitors are charged. Digital pixel data outputted from the digital controller undergoes a level changing depending on a voltage across the electrodes of the capacitors, according to a charge conservation.

Growing community of inventors

Tokyo, Japan

Takashi Taguchi