Mitsubishi Denki Kabushiki Kaisha

Renesas Electronics Corporation

Renesas Technology Corp.

Renesas Device Design Corporation

Fujitsu Corporation

Zeon Corporation

Semiconductor Energy Laboratory Co., Ltd.

Japan Science and Technology Agency

Nippon Zeon Company, Ltd.

Takashi Okuda

Toshio Kumamoto

Yasuo Morimoto

Yuko Maruyama

Takahiro Miki

Masao Ito

Shuji Saitoh

Tomoaki Atsumi

Koichi Saiki

Takashi Matsumoto

Akira Kitaguchi

Mayumi Kubomura

Yoshinari Tsuzaki

Youichi Konuma

Tatsuo Sengoku

Tatsuya Haga

Kristi M Moore

Osamu Matsumoto

Shuji Saito

Sakiko Saeki

Kristi M Dorsey

Takanori Sasaki

Masaomi Kamakura

Hiroaki Nakazato

Hiroyuki Hanazawa

Yoichi Konuma

Noboru Iwabuchi

Yukihiro Hayakawa

Hironori Mieno

Jyunichi Shimada

Probability of malfunction of a semiconductor storage device is reduced. A shielding layer is provided between a memory cell array (e.g., a memory cell array including a transistor formed using an oxide semiconductor material) and a peripheral circuit (e.g., a peripheral circuit including a transistor formed using a semiconductor substrate), which are stacked. With this structure, the memory cell array and the peripheral circuit can be shielded from radiation noise generated between the memory cell array and the peripheral circuit. Thus, probability of malfunction of the semiconductor storage device can be reduced.

Semiconductor storage device comprising peripheral circuit, shielding layer, and memory cell array

Semiconductor storage device comprising peripheral circuit, Shielding layer, and memory cell array

A delta-sigma A/D converter having plural input channels comprises a first quantizer which quantizes and outputs a received signal; a first D/A converter which converts an output signal of the first quantizer into an analog signal, and outputs the converted analog signal; a first operation unit which outputs a signal indicative of a difference of the first analog input signal and an output signal of the first D/A converter; a first integrator which integrates an output signal of the first operation unit and outputs the integrated signal; a first dither circuit which generates a first dither signal; and a second operation unit which adds the first dither signal to the output signal of the first integrator and outputs the added signal to the first quantizer.

Delta-sigma A/D converter

A memory device including first to fourth memory cell arrays and a driver circuit including a pair of bit line driver circuits and a pair of word line driver circuits is provided. The first to fourth memory cell arrays are overlap with the driver circuit. Each of the pair of bit line driver circuits and a plurality of bit lines are connected through connection points on an edge along the boundary between the first and second memory cell arrays or on an edge along the boundary between the third and fourth memory cell arrays. Each of the pair of word line driver circuits and a plurality of word lines are connected through second connection points on an edge along the boundary between the first and fourth memory cell arrays or on an edge along the boundary between the second and third memory cell arrays.

Memory device

A delta-sigma modulator is configured to feedback an output signal of a quantizer to an input of an integrator, and also feedback to the input of the integrator a differentiated error signal representing derivative of quantization error caused by the quantizer.

Delta-sigma modulator

To eliminate the substrate voltage dependences of the respective resistance values of resistor elements, in the resistor elements coupled in series to each other over respective substrate regions, the ends of the resistor elements are coupled to the corresponding substrate regions by respective bias wires such that respective average potentials between the substrate regions of the resistor elements and the corresponding resistor elements have opposite polarities, and equal magnitudes.

Semiconductor device having resistors with a biased substrate voltage

A semiconductor device includes a semiconductor substrate including a main surface; a plurality of first interconnections formed in a capacitance forming region defined on the main surface and extending in a predetermined direction; a plurality of second interconnections each adjacent to the first interconnection located at an edge of the capacitance forming region, extending in the predetermined direction, and having a fixed potential; and an insulating layer formed on the main surface and filling in between each of the first interconnections and between the first interconnection and the second interconnection adjacent to each other. The first interconnections and the second interconnections are located at substantially equal intervals in a plane parallel to the main surface, and located to align in a direction substantially perpendicular to the predetermined direction.

Semiconductor device

In a delta-sigma A/D converter provided with plural channels for converting an analog input signal into a digital signal, an adverse influence of an idle tone is reduced in each channel. The delta-sigma A/D converter comprises: a first quantizer which quantizes and outputs a received signal; a first D/A converter which converts an output signal of the first quantizer into an analog signal, and outputs the converted analog signal; a first operation unit which outputs a signal indicative of a difference of the first analog input signal and an output signal of the first D/A converter; a first integrator which integrates an output signal of the first operation unit and outputs the integrated signal; a first dither circuit which generates a first dither signal; and a second operation unit which adds the first dither signal to the output signal of the first integrator and outputs the added signal to the first quantizer.

It is an object of the present invention to surely protect a predetermined semiconductor element or a predetermined semiconductor element group in an analog block from a noise generated from a digital block. A semiconductor device according to the present invention includes a semiconductor substrate, a digital block to be a region in which a digital circuit is formed and an analog block to be a region in which an analog circuit is formed, arranged by separating an upper surface of the semiconductor substrate and a substrate potential fixing region provided on the semiconductor substrate so as to surround in a planar view the predetermined semiconductor element group in the analog block, and a pad connected to the substrate potential fixing region and receiving a predetermined potential from an external part.

A disclosed optical add/drop multiplexing device demultiplexes a first signal into multiple signals according to wavelengths, drops one or more of the demultiplexed signals to a transponder, adds one or more signals output from the transponder, multiplexes these signals into a second signal, and outputs it. The device includes an injecting unit for injecting one of measurement signals, each of whose wavelength corresponds to that of a different demultiplexed signal, into a core of a multicore cable within the device, the core being used to transmit the different demultiplexed signal having the corresponding wavelength; a preventing unit for preventing the one measurement signal from emanating; a measuring unit for measuring, for each wavelength, levels of the one measurement signal before and after the corresponding core; a calculating unit for calculating loss of the corresponding core, based on the measured levels; and an informing unit for reporting the calculated loss.

Optical add/drop multiplexer

The present invention discloses a method including the steps of a) confirming the status of a path corresponding to each node apparatus in the ring network by using a predetermined control information that includes a function of adding/deleting a predetermined path on a physical layer, b) instructing each node apparatus to add/delete the predetermined path by using the predetermined control information when the status of the path corresponding to each node apparatus is confirmed to be normal, c) reporting completion of the addition/deletion of the predetermined path to each node apparatus by using the predetermined control information when the addition/deletion of the predetermined path is adequately performed by each node apparatus, and d) reporting the addition/deletion of the predetermined path to a ring application function included in the ring application of the data link layer when the completion of the addition/deletion of the predetermined path is adequately reported by each node apparatus.

Method for increasing/reducing band data rate of ring-based network and node apparatus of the ring-based network

There is provided a technique for reducing the adverse effect of idle tones in the channels in a &#x394;&#x3a3;-type A/D converter including a plurality of channels for converting analog input signals into digital signals. The &#x394;&#x3a3;-type A/D converter includes an L channel for converting a left analog input signal into a digital signal and an R channel for converting a right analog input signal into a digital signal. Each of the L channel and the R channel includes a DC dither circuit for generating a DC addition voltage for shifting the frequency of an idle tone. In the L channel and the R channel, DC addition voltages generated by DC dither circuits are different from each other.

&#x394;&#x3a3;-type A/D converter

Growing community of inventors

Tokyo, Japan

Takashi Okuda