Nippondenso Co., Ltd.

Denso Corporation

Sumitomo Metal Ceramics Inc.

Other

Sumitomo Metal (smi) Electronics Devices, Inc.

Takashi Nagasaka

Yukihiro Maeda

Yasutomi Asai

Mitsuhiro Saitou

Yasunobu Hirao

Yuji Ootani

Yuji Motoyama

Tohru Nomura

Yoshiyuki Miyase

Kengo Oka

Shinji Ota

Hidekazu Katsuyama

Yuji Otani

Mamoru Urushizaki

Hirokazu Imai

Tetsuo Nakano

Makoto Koyama

Akihiko Naito

Nozomi Tanifuji

Hideki Nakagawara

Koji Sawada

Yuzi Otani

Norihisa Imaizumi

Akira Tanahashi

Takashi Yamazaki

Hiroyuki Ban

Hajime Ito

Koji Takeuchi

Takahisa Koyasu

Takashi Yamasaki

Takeshi Ishikawa

Atsushi Kanamori

Hiroyuki Yamakawa

Kan Kinouchi

Shinya Terao

Kenichi Gohara

Takamasa Okumura

Masataka Aoki

Kohmei Kawaguchi

Yuji Ontani

Kyoko Nagaoka

Syoichi Nakagawa

Masayuki Miyairi

Kazumasa Naito

Toshio Suzuki

Yoshiaki Shimojo

The adhesion between a protective layer, which covers a wiring layer, and a potting material, which covers a microchip, in a hybrid IC is improved without placing an additional material between the protective layer and the potting material. The potting material is separated from other electronic devices on the hybrid IC. To improve adhesion, the surface roughness of the protective layer is increased by adding insulating particles to the protective layer, striking the surface of the protective layer with ceramic particles, or replicating a mesh pattern of a screen mask on the surface of the protective layer. To keep the potting material separated from the other electronic devices, another potting material for covering the electronic devices, which is more viscous than the potting material for covering the microchip, is potted and hardened before the potting material for covering the microchip is potted.

Potted hybrid integrated circuit

Several electronic parts are mounted on several ceramic substrates in a semiconductor device, and are wire bonded to the respective ceramic substrates through bonding wires. The electronic parts and the bonding wires are covered with an enclosing member on every ceramic substrate, and an inside of the enclosing member is filled with silicone gel for sealing. The ceramic substrates are bonded to a radiation fin together, and are mounted on a motherboard perpendicularly to the motherboard.

Semiconductor device including bonded wire based to electronic part and method for manufacturing the same

A substrate has a first surface and a second surface. A plurality of pads is formed on the first surfaces. Each pads has a Cu plating layer and an Au plating layer that is directly formed on the Cu plating layer. Al wiring or Au wiring is bonded with the pads. The thickness of the Au plating layer that is bonded with the Al wiring is less than 0.5 &mgr;m. Thickness of the Au plating layer that is bonded with the Au wiring is 0.05 &mgr;m or more.

Electrical device having metal pad bonded with metal wiring and manufacturing method thereof

At the step of printing a wiring portion of a ceramic substrate with a conductive adhesive for mounting an IC chip or a part such as a capacitor other than the IC chip, a wire bonding pad made of gold is formed by the ball bonding method or the like at the portion of the wiring portion to be wire-bonded. After the pad was formed and before the conductive adhesive is printed, a heat treatment is performed to cause a thermal diffusion between the wiring portion and the pad to improve the jointability therebetween.

Electronic part mounting method

A multilayer wiring substrate has a passive circuit element disposed on an insulating base substrate, and an insulating layer is disposed on the insulating base substrate with the passive circuit element interposed therebetween. The insulating layer is formed to have via holes for exposing specific portions of the passive circuit element, and a terminal electrodes are disposed in the via holes. Accordingly, the entire area of the multilayer wiring substrate can be reduced, and cracks caused by residual stress produced by a firing step can be prevented.

Method of manufacturing a circuit substrate

In a mounting structure of a flip chip IC, the flip chip IC is mounted on an alumina laminated substrate through conductive lands of the substrate and bumps of the flip chip IC. A space between the flip chip IC and the substrate is filled with resin. Further, inspection lands are provided on the substrate for inspecting the flip chip IC, and are electrically connected to the conductive lands through vias and inside wires provided in the substrate. That is, the inspection lands are connected to the conductive lands to bypath an edge portion of the resin. As a result, separation of the resin from the substrate can be prevented.

Mounting structure of semiconductor element

A mounting structure includes a laminated ceramic capacitor mounted on a mounting substrate. The laminated ceramic capacitor includes a main body chip made by a ceramic dielectric, internal layer electrodes, and pair of terminal electrodes. The mounting substrate is made by alumina substrate, and has a pair of substrate electrodes made by copper plating. The laminated ceramic capacitor is mounted on the mounting substrate by using an Ag paste. Here, the substrate electrode is set to be smaller than the Ag paste. That is, the Ag paste is extruded from the terminal electrodes and the substrate electrode so as to contact to both of the main body chip and the mounting substrate. Because the Ag paste has a high adhesive strength compared to that when it is bonded with a metal, total adhesive strength can be improved. Consequently, the reliability of mounting can be improved.

Mounting structure of electronic parts and mounting method of electronic parts

A multilayer circuit board for holding a flip chip thereon includes laminated first to fourth substrates. A first pattern integrated portion having a locally high pattern density is provided on the second substrate. Further, on the fourth substrate which is disposed on an opposite side of the second substrate with respect to a center in a laminated direction of the circuit board, a second pattern integrated portion having a locally high pattern density is disposed to correspond to the first pattern integrated portion. Accordingly, a local warp can be prevented from being produced on the mounting surface of the multilayer circuit board when the circuit board is manufactured by baking.

Multilayer circuit board having no local warp on mounting surface thereof

Multilayer wiring substrate for hybrid integrated circuit and method for manufacturing the same

A circuit board comprises wiring parts containing silver on a substrate, and a conductivity suppressing agent such as a potassium compound provided between the wiring parts, for preventing the silver attached on the substrate between the wiring parts from being conductive. Therefore, the insulation deterioration between the wiring parts can be suitably suppressed, which usually occurs when a voltage is applied between the wiring parts containing silver on the substrate under a high temperature atmosphere, irrespective of the presence or absence of water or water vapor. That is, the high temperature leakage phenomenon can be suitably suppressed.

Conductive paste composition including conductive metallic powder

Provided are a soldering flux or paste containing an organic substance which has at least two hydroxyl (--OH) groups in a molecule and of which the temperature at which the mass % becomes approximately 0% is not lower than approximately 170.degree. C. and not lower than the solid phase linear temperature of the solder, as measured by thermal gravimetry in which a flow rate of an air or nitrogen (N.sub.2) gas atmosphere is 200 ml/min and a rate of temperature rise is 10.degree. C./min, and a soldering method using the same. The soldering flux or paste of the present invention gives good wettability to a matrix to be bonded in a normal temperature profile and in a non-reductive atmosphere without leaving any residue.

Soldering method using soldering flux and soldering paste

A ball is formed at the tip of a wire projecting from a capillary. The capillary is positioned above an interconnection, and ball bonding forms a bump on the interconnection. The capillary is then moved next to the bump and wedge bonding is carried out. Next, the capillary is moved upward and another ball is formed at the tip of the wire, and the wire is primary bonded to a bonding pad of a semiconductor chip. The wire is then looped and the capillary is positioned above the bump, and secondary bonding is carried out. As a result, the formation of tails on the bump is prevented.

Wire bonding method

Via portions are formed in a first green sheet for a first layer of a laminated substrate. Then, conductive lands are formed on a surface of the first green sheet and a wiring pattern is formed on a back face of the first green sheet to be connected to the conductive lands through the via portions. The thus formed first green sheet is joined to a second green sheet having via portions therein so that the wiring pattern of the first green sheet contacts the via portions of the second green sheet. In this case, by forming the wiring pattern on the back face of the first green sheet, lamination slippage of the wiring pattern caused by lamination of the first and second green sheets can be prevented.

Method for manufacturing ceramic laminated substrate

A gold (Au) thick film land constituting a wire bonding electrode is formed by printing and sintering a gold (Au) thick film paste previously added with copper (Cu) to overlap with a copper (Cu) thick film which is formed as a wiring layer on a ceramic substrate. A semiconductor part mounted on the substrate and the gold (Au) thick film land are directly connected by a gold (Au) wire thereby electrically connecting the semiconductor part and the copper (Cu) thick film. In forming the gold (Au) thick film land, the gold (Au) thick film paste previously added with copper (Cu) is used. Therefore, disconnection caused by the Kirkendoll phenomenon is restrained and stable bonding between the copper (Cu) wiring layer and the gold (Au) thick film land can be achieved.

Thick film circuit board and method of forming wire bonding electrode

Soldering flux, soldering paste and soldering method using the same

Growing community of inventors

Anjo, Japan

Takashi Nagasaka