Hitachi, Ltd.

Takashi Morikawa

Akio Sasaki

Takeshi Shigeno

Kiichi Sato

Yoshihiko Kadowaki

Tetuji Ogawa

Hiroya Okuda

A data processing apparatus has a basic processing unit (BPU),a channel processor (CHP),message channel units (MCH),n, message channel receivers (MCHR),m connected respectively to the message channel units,n, and a structured external storage device (SES),which may be connected to a plurality of hosts via the message channel receivers,m and which includes a cache memory,for accommodating data shared by the hosts. Before issuing a synchronous instruction, a program issues an instruction notifying in advance the inventive apparatus of the intended use of hardware resources. When the hardware resources are reserved by the notifying instruction, the apparatus guarantees the subsequent execution of the synchronous instruction. Because synchronous instructions are always carried out, the system overhead is lowered.

Data processing apparatus for executing synchronous instructions prior to executing asynchronous instructions

In an input/output process device for controlling data transfer between a central processing unit and an input/output device through a channel by use of any of a plurality of input/output control devices connected to the input/output device, a memory unit is disposed so as to store information representing the address of the input/output control device in association with an identification number of the channels connected to the input/output control device. When selecting the channel for data transfer, the input/output process device reads out the information representing the address of the input/output control device from the memory unit and generates the address for the input/output control device on the basis of the information read out.

Input/output system capable of allotting addresses to a plurality of

Disclosed is a channel control system for controlling data transfers between a main storage and input/output devices. A plurality of channels are controlled by a common controller. The controller divides the processing for data transfer requests into a plurality of processing stages to allow the corresponding number of the channels to be controlled simultaneously by executing the processing for different channels separately at the divided individual processing stages.

Growing community of inventors

Hadano, Japan

Takashi Morikawa