Hitachi, Ltd.

Nissan Motor Company Limited

Tokyo Shibaura Denki Kabushiki Kaisha

Japan Tobacco Inc.

Shiseido Company, Limited

Hitachi Software Engineering Company, Ltd.

Calsonic Corporation

Nittan Valve Co., Ltd.

Hitachi Electronics Services Co. Ltd.

Spansion Llc.

Alaxala Networks Corporation

Ntt Electronics Corporation

Daido Steel Co., Ltd.

Takashi Matsumoto

Junji Noguchi

Takayuki Oshima

Kensuke Amemiya

Yuuichirou Ueno

Toshihiko Onozuka

Yoshinori Satoh

Takafumi Ishitsu

Shinichi Kazui

Hiroyuki Ureshino

Norihito Yanagita

Jun Ishii

Atsushi Ueoka

Tomoyuki Seino

Hiroshi Wada

Tadashi Yamagishi

Tsutomu Ito

Eiji Takahashi

Shinji Fushimi

Masayuki Kawaharata

Noriyuki Habuka

Masana Noma

Shunzo Umegaki

Kouji Iwahashi

Masatake Muranaga

Madoka Tanouchi

Yoshihiro Hayashi

Takashi Nomura

Hideki Osaka

Akira Yamagiwa

Yutaka Watanabe

Tsutomu Hara

Hiroshi Tanaka

Kazuo Sugai

Hideaki Sasaki

Tetsuya Kanbe

Tomiyuki Nanba

Tateoki Miyauchi

Yoshikazu Soyama

Kenzo Ito

Sadayuki Nakamura

Hitoshi Yokota

Hajime Matsuda

Tsutomu Imai

Takashi Minami

Noriko Tomita

Toshiaki Kobayashi

Masaki Yoshinaga

Kenji Kashiwagi

Ryuta Nagai

Tatsuhiro Nozue

Akio Nasu

Satoshi Hanazawa

Masaaki Inoue

Masaaki Ishiwatari

Takayuki Miyazaki

Yohei Hamano

Toshio Yoneyama

Junji Baba

Yoshio Okada

Yoshiyuki Ogusu

Hideyuki Sumiyoshi

Tatsuji Sakamoto

Makoto Yoshida

Shigehiro Tomita

Hiromi Harada

Kimio Ohno

Manabu Sawa

Kazuyoshi Futamura

Kazuhiro Matsuo

Masashi Miyano

Kiyotaka Akiyama

Hideaki Tsuge

Takashi Isa

Manabu Tagaki

Tetsuo Tsukamoto

Shinobu Irikura

Kiyoshi Ohkawachi

Toshihiko Moriwaki

Atsumi Hatano

Masakazu Ishibashi

Mitugu Kojima

Kiyosi Okawachi

Naruaki Kiriki

Tetuo Tukamoto

Nobuyuki Sudo

Isokazu Matsuzaki

Hiroaki Hamanaka

Katsumi Yabe

Manabu Demoto

Keiichi Shiobara

Yoji Kawashima

A binary arithmetic device includes an LPS/MPS determining unit that determines, using a context variable, a range length, and an offset, whether a code is an inferior probability code or a superior probability code, a renormalization processing unit that performs renormalization processing on the range length and the offset, and a context-variable calculating unit that derives the binary data of the code using a determination result and updates the context variable according to the determination result. The renormalization processing unitincludes a first renormalizing unit and a second renormalizing unit and a selecting unit that selects, according to the determination result, an output of the first renormalizing unit or an output of the second renormalizing unit.

Binary arithmetic decoder and binary arithmetic decoding device

A control circuit for controlling a power supply including a first switch and a second switch coupled in series between a first potential and a second potential. The control circuit includes a detection circuit that detects a magnitude relation of a voltage value at a node between the first and second switches and a reference value during a period in which the first switch and the second switch are inactivated. The detection circuit generates a control signal corresponding to the magnitude relation. A regulation circuit regulates a switching timing of the second switch in response to the control signal to decrease a difference between the voltage value at the node and the reference value.

Control circuit for power supply including a detection circuit and a regulation circuit for regulating switching timing

The present invention relates to an electronic device including plural circuit board units that can be removed from the electronic device. The electronic device is designed to increase a data transfer rate between the circuit board units by using a circuit board for interconnect for electrically coupling the circuit board units placed in the electronic device, and using a cable for electrically or optically coupling the circuit board units placed in the electric device, or both of the cables.

Communication apparatus with removable circuit boards

In a semiconductor device, capacitance between copper interconnections is decreased and the insulation breakdown is improved simultaneously, and a countermeasure is taken for misalignment via by a manufacturing method including the steps of forming an interconnection containing copper as a main ingredient in an insulative film above a substrate, forming insulative films and a barrier insulative film for a reservoir pattern, forming an insulative film capable of suppressing or preventing copper from diffusing on the upper surface and on the lateral surface of the interconnection and above the insulative film and the insulative film, forming insulative films of low dielectric constant, in which the insulative film is formed such that the deposition rate above the opposing lateral surfaces of the interconnections is larger than the deposition rate therebelow to form an air gap between the adjacent interconnections and, finally, planarizing the insulative film by interlayer CMP.

Semiconductor device and manufacturing method of the same

Provided is a method for manufacturing a semiconductor integrated circuit device which enables a timing optimization without giving additions to a manufacturing process and increasing cost and TAT. Existence of a timing constraint violation is determined, and when a timing constraint violation is detected, to dissolve the violation, a void formation inhibition zone is set up in a part or all of a spacing (inter-wiring spacing) between an optimization-target wiring which needs a further delay time of a signal and clock and an adjacent wiring adjacent to the optimization-target wiring having a spacing within a specified wiring spacing, and an insulating film is formed in a spacing (inter-wiring spacing) between the optimization-target wiring and the adjacent wiring in the void formation inhibition zone, and voids are formed in a spacing (inter-wiring spacing) between the optimization-target wiring and the adjacent wiring outside the void formation inhibition zone.

Delay adjusting method and LSI that uses air-gap wiring

Disclosed herewith is a circuit system for improving a slew rate while reducing the power consumption in an operational amplifier that requires a comparatively high supply voltage (e.g., 5 V or upper) operation. The operational amplifier includes level shift circuits, differential pairs whose source connected serially, current voltage conversion circuit and output stage. The level shift circuits convert a differential input signal level and output to differential pairs. Combination of level shift circuit and differential pairs realize input signal difference detection and driving current control in the common circuit.

Operational amplifier

A positron emission tomography apparatus installs a plurality of detector units in the circumference of a bed. The detector unit installs a plurality of combined substrates including detectors, analogue ASICs, and a digital ASIC and a voltage adjustment device inside a housing. A partition plate installed inside the housing separates the region inside the housing into a first region installed with the combined substrates and a second region installed with the voltage adjustment device. The partition plate blocks noise generated in the voltage adjustment device so as not to affect &#x3b3;-ray detection signals outputted from the detectors, thereby preventing the effect of the noise generated in the voltage adjustment device toward &#x3b3;-ray detection signals and shortening the examination time.

Radiological imaging apparatus and positron emission tomographic apparatus

There is a need for high-precision detection timing in a radiological imaging apparatus using a semiconductor detector so as to decrease time variations against a noise and easily correct process variations. A radiation detection circuit includes: a semiconductor detector; charge accumulation means connected to the semiconductor detector; a circuit to discriminate timing of a signal generated from the charge accumulation means based on a specified threshold value; a shaperto limit a band from the charge accumulation means using a first time constant; a shaperto limit a band from the charge accumulation means using a second time constant; a circuitto hold an analog peak valuefor the shaper; and a circuitto hold an analog peak valuefor the shaper. The radiation detection circuit performs a signal process to generate timing correction data based on the analog peak valuesandand correct timing data from the timing discriminator circuit.

Radiation detection circuit and radiological imaging apparatus using the same

A radiation detection circuit having a multi-channel input used for radiation measurement and capable of canceling cross-talk noise generated from a logic circuit for controlling a channel and enabling low noise radiation measurement easily and precisely. The radiation detection circuit also generates an inverted signal for each of input/output signals needed for controlling its logic and cancels a noise charge generated by coupled capacity between a bonding wire (analog input side in IC package) for connecting its output to another radiation detection circuit and a bonding wire of each of input/output signals of the logic control circuit by generating an inverted noise charge with coupled capacity between the inverted signal and its output when in logic controlling, thereby suppressing the cross-talk noise generated by each of its input/output signals.

Radiation detection circuit

When data is transmitted to a destination of data transmission, a multiplex communication systemas a source of data transmission receives, from the destination of data transmission through a data reception processing unit, the information about the amount of data which can be successively received, compares the amount of data which can be successively received with the amount of data which can be successively transmitted as preset, selects the smaller amount, creates a packet for successively transmitting data frames corresponding to the amount of data as selected, and transmit said packet through a data transmission processing unit

Data transmitting device and method for transmitting and receiving data and data communication system

A radiological imaging apparatus which can keep detectors at a low temperature, improve a time resolution and an energy resolution and perform an accurate diagnosis is provided. In the radiological imaging apparatus, an imaging apparatus imaging a testing subject supported by a bed couples a detector board having placed thereon radiation detectors detecting radiations emitted from the testing subject and a signal processing board having placed thereon a signal processing circuit processing detection signals of the radiation detectors via an intermediate board by connectors, and separates a detector space including the radiation detectors and a signal processing circuit space including the signal processing circuit.

Radiological imaging apparatus and cooling method of same

A processing circuit, which carries out coincidence counting, acquires calibration data so that time delays of &#x3b3;-ray detection signals from radiation detectors coincide with one another. A technique for acquiring calibration data faster and easily is provided to attain high time precision and respond to multi-channeling of detectors. A signal from a test signal generator is sent to signal processing apparatuses and coincidence count events are generated as a test. The events generated are processed by a delay time control apparatus and a variable delay circuit is controlled to improve the accuracy of coincidence counting.

Radiological imaging apparatus and timing correction method therefor

Growing community of inventors

Yokohama, Japan

Takashi Matsumoto