Shinko Electric Industries Co., Ltd.

Takashi Kurihara

Michio Horiuchi

Shigeru Mizuno

Kiyoshi Oi

Mitsutoshi Higashi

Kei Murayama

Naoyuki Koizumi

Shigetsugu Muramatsu

Akinori Shiraishi

Hideaki Sakaguchi

Hidehiko Kira

Takaharu Yamano

Takashi Kubota

Kazutaka Kobayashi

Tadashi Arai

Tsuyoshi Kobayashi

Naohiro Mashino

Toshio Kobayashi

Kiyoaki Iida

Takatoyo Yamakami

Yukinori Hatori

Takashi Mochizuki

Yuka Tamadate

Tomio Nagaoka

Masao Aoki

An embedded PCB includes a first substrate, an electronic component mounted on the first substrate, a second substrate provided on a side opposite to the first substrate with the electronic component interposed therebetween, and electrically connected to the first substrate via substrate bonding members, and an encapsulating resin filled between the first and second substrates, covering the electronic component, and also filled between the electronic component and the first substrate. The first substrate includes, on a side closer to the electronic component, pads to be bonded to electrodes of the electronic component via bonding portions, and a protective insulating layer including openings. The pads include outermost peripheral pads in an outermost periphery including four corners of an approximately rectangular area in a plan view, and inner pads in an area surrounded by the outermost peripheral pads.

Embedded printed circuit board

A wiring substrate includes a first multi-layer wiring layer having a stacked via structure including a first electrode pad, a second multi-layer wiring layer having a non-stacked via structure including a second electrode pad. The second electrode pad is formed on an uppermost first insulating layer. The first electrode pad is formed on a second insulating layer which is located to a position lower by one layer than the first insulating layer, and the first electrode pad is arranged in an opening portion of the first insulating layer such that the upper face and the side face of the first electrode pad are exposed.

Wiring substrate, semiconductor device, method of manufacturing wiring substrate, and method of manufacturing semiconductor device

A wiring substrate includes a first multi-layer wiring layer including an insulating layer formed of a non-photosensitive resin, a plurality of external connection pads formed on an upper face side of the first multi-layer wiring layer, and a second multi-layer wiring layer formed on the first multi-layer wiring layer, the second multi-layer wiring layer including an insulating layer formed of a photosensitive resin, the second multi-layer wiring layer having a wiring pitch narrower than the wiring pitch of the first multi-layer wiring layer. The external connection pads are exposed from the insulating layer of the second multi-layer wiring layer.

Wiring substrate and semiconductor device

A bonding tool holds a lower chip against a release tape held by a suction force. The bonding tool has an electronic-component suction opening against which the lower chip is held and, surrounding the electronic-component suction opening, a trench that accommodates the release tape. The lower chip is heated, by being pressed against an underfill material and, thus, an area on which an upper chip is mounted is formed in such a manner that the underfill material protrudes out from the lower chip. During the heating, because an expanded part of the release tape, expanded due to heat, is inserted into the trench, no folded line is formed on the upper surface of the underfill material.

Electronic packaging apparatus and electronic packaging method

A semiconductor element includes connection terminals. The connection terminals are each shaped in such a manner that the transverse cross-sectional area in a portion near the leading end thereof decreases toward the leading end. Specifically, the shape of each of the connection terminals is columnar except for the portion near the leading end, and the side surface in the portion near the leading end of the connection terminal is shaped in a tapered form. Furthermore, a metal layer for improving a solder wettability may be formed at least on the side surface shaped in the tapered form, of the connection terminal.

Semiconductor element, semiconductor element mounted board, and method of manufacturing semiconductor element

In a method of manufacturing a semiconductor-device mounted board, connection terminals are formed on electrode pads on a semiconductor integrated circuit respectively. A first insulating layer is formed to cover the connection terminals. A plate-like medium having a rough surface is disposed on the first insulating layer. The rough surface of the plate-like medium is pressed onto the first insulating layer so that a part of each of the connection terminals is exposed. A semiconductor device is produced by removing the plate-like medium. A second insulating layer is formed to cover side surfaces of the semiconductor device. A wiring pattern is formed to cover surfaces of the first and second insulating layers, the wiring pattern being electrically connected to the exposed connection terminal parts.

Semiconductor-device mounted board and method of manufacturing the same

A manufacturing method of a semiconductor device includes a film state underfill resin adhering step wherein film state underfill resin in a semi-cured state is adhered on the first surface of the board main body without forming a gap between the first surface of the board main body and the pad; a flattening step wherein an upper surface of the film state underfill resin is flattened; a chip connecting step wherein the semiconductor chip is pressed onto the upper surface of the film state underfill resin after the flattening step so that the semiconductor chip is flip chip connected to the pad; and an underfill resin forming step wherein the film state underfill resin is cured so that the underfill resin is formed between the semiconductor chip and the wiring board.

Manufacturing method of semiconductor device having underfill resin formed without void between semiconductor chip and wiring board

In a semiconductor apparatus, a semiconductor element is mounted on a wiring substrate. Wiring patterns and protrusions are formed on a surface of a substrate with the wiring patterns extending on tops of the protrusions. The surface of the substrate on which the wiring patterns are formed are covered with an insulating layer. Surfaces of connection parts of the wiring patterns formed on the tops of the protrusions are formed with the surfaces of the connection parts exposed to a surface of the insulating layer on a level with the surface of the insulating layer or in a position lower than the surface of the insulating layer. The connection parts are formed as pads for connection formed in alignment with connection electrodes of the semiconductor element. The semiconductor element is mounted by making electrical connection to the connection parts by flip chip bonding.

Wiring substrate and manufacturing method thereof, and semiconductor apparatus

After plural semiconductor elements are stacked to form a stacked body P, side wirings are formed on the side surface of the stacked body P, thereby manufacturing a semiconductor apparatus in which the respective semiconductor elements are electrically connected to one another. In this case, as the semiconductor element, a semiconductor elementis employed in which a gold wirewith its one end connected to an electrode terminal of the semiconductor element is extended out to the side surface. A conductive pastecontaining conductive particles applied over a predetermined length of a transferring wireis transferred to the side surface of the stacked body P so that the gold wiresextended out to the side surfaces of the semiconductor elementsare connected, thereby forming the side wirings.

Method for forming side wirings

A plurality of quadrilateral-shaped semiconductor elements are stacked on the one surface of a circuit substrate. A side surface wiring for making electrical connection between each of the electrode terminals of the semiconductor elements and a pad formed on the circuit substrate is formed by applying a conductive paste containing conductive particles. A metal wire whose one end is connected to the electrode terminal is extended along a tapered surface formed by cutting off an edge of the electrode terminal surface on which the electrode terminal is formed among edges formed along each of the sides of the semiconductor element. At least a part of the metal wire extended from each of the electrode terminals of the semiconductor elements to the tapered surface is electrically connected to the side surface wiring.

Semiconductor apparatus having side surface wiring

A method of manufacturing a semiconductor device in which a semiconductor elementis mounted on a substratethrough a flip-chip connection, includes the steps of cladding gallium as a bonding materialto a connecting padformed on a surface of the substrate, diffusing copper from the connecting padformed of the copper into the bonding materialthrough heating under vacuum, thereby bringing a state of a solid solution of the gallium and the copper, and aligning a connecting bumpformed on the semiconductor elementwith the connecting padand bonding the connecting bumpto the connecting padthrough the bonding materialin a state of a solid solution under heating.

Semiconductor device with flip-chip connection that uses gallium or indium as bonding material

A method for manufacturing a semiconductor package, the method including the steps of attaching a bottom surface of a semiconductor wafer to a first supporting member, forming a through hole in the semiconductor wafer, separating the semiconductor wafer from the first supporting member, forming an insulating layer on at least the bottom surface of the semiconductor wafer and the inner wall of the through hole, forming a conducting layer underneath the semiconductor wafer, the conducting layer spanning at least the bottom of the through hole; and forming a conductive member in the through hole and in electrical contact with the conducting layer.

Method for manufacturing semiconductor package having electrodes penetrating through semiconductor wafer

A capacitor includes a dielectric layer, a manganese dioxide layer, an organic solid electrolyte layer, and a carbon paste layer that are stacked in this order between a first electrode, which serves as an anode, and a second electrode, which serves as a cathode. Between the first electrode and the second electrode, an insulating resin layer is formed in the shape of a rectangular frame so as to surround the organic solid electrolyte layer. A lower end portion of the resin layer is fixed to the manganese dioxide layer while an upper end portion of the resin layer is fixed to the second electrodeTherefore, complete sealing is established between the first electrode and the second electrode in the outer peripheral end face of the capacitor.

Capacitor, capacitor-embedded board, and method for manufacturing the capacitor

In manufacturing a thin semiconductor chip, a wafer is stably held during processing to maintain a stable shape and to avoid generation of cracks on the wafer. When a thin wafer having a surface thereon is to be processed, a rigid support body is adhered to the other surface of the thin wafer and a ring-shaped frame, encircling an outer periphery of the thin wafer, is adhered to the rigid support body.

Method for manufacturing thin semiconductor chip

A method of manufacturing a micro-semiconductor element comprising the following steps of: adhering a semiconductor waferhaving a circuit surface and a back surface to a support platevia a protective filmso that the circuit surface faces to the protective film; reducing a thickness of the semiconductor wafer while the semiconductor wafer is supported by the support plate; dividing the semiconductor wafer into individual semiconductor elementswhile the semiconductor wafer is adhered to the protective film; moving the semiconductor elements from the protective film to an adhesive peeling filmin such a manner that the back surfaces of the semiconductor elements are adhered to the peeling film; supporting a periphery of the peeling film by a support ring; and picking up the individual semiconductor element by a pickup device when the back surface of semiconductor element is pushed up, via the peeling film, by a pushup pin. An individual semiconductor element can also be picked up by an air suction nozzle

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Nagano, Japan

Takashi Kurihara