Matsushita Electric Works, Ltd.

Takashi Kishida

Yuji Suzuki

Hitomichi Takano

Masahiko Suzumura

Yoshiki Hayasaki

Yoshifumi Shirai

Takeshi Yoshida

Yasunori Miyamoto

Yoshimitsu Nakamura

Kazunari Yoshimura

Takaaki Yoshihara

Kuninori Nakamura

Hiroshi Maeda

Hideshi Hamaguchi

Tatsuya Honda

Kazufumi Oogi

A laser distance measuring apparatus, for measuring the distance between objects existing in two directions at least as seen from the apparatus by using laser light, comprises two projectors for projecting laser beams along a specified projection axis toward each one of the objects, a photo detector for receiving reflected light of projection from each object, a distance measurement processor for measuring the distance from a reference point of the apparatus to each object on the basis of the reception signal to the projection by the photo detector, and a distance calculation processor for calculating the distance between the objects on the basis of the distance data measured by the distance measurement processor and the angle formed by two projection axes, in which the projection axis by one projector is variable in angle with respect to the other projector. Therefore, the distance between objects can be measured easily and at high precision by one distance measuring operation only.

Laser distance measuring apparatus

A solid state relay composed of a series connected pair of LDMOSFETs has a minimized output capacitance. Each LDMOSFET is configured to have a silicon layer of a first conductive type, a drain region of the first conductive type diffused in the top surface of the silicon layer, a well region of a second conductive type diffused in the silicon layer in a laterally spaced relation from the drain region, and a source region of the first conductive type diffused within the well region to define a channel extending between the source region and a confronting edge of the well region along the top surface of the silicon layer. Each LDMOSFET is of an SOI (Silicon-On-Insulator) structure composed of a silicon substrate placed on a supporting plate, a buried oxide layer on the silicon substrate, and the silicon layer on the buried oxide layer. The well region is diffused over the full depth of the silicon layer to have its bottom in contact with the buried oxide layer, so that the well region forms with the silicon layer a P-N interface only at a small area adjacent the channel. Because of this reduced P-N interface and also because of the buried oxide layer exhibiting a much lower inductive capacitance than the silicon layer, it is possible to greatly reduce a drain-source capacitance for minimizing the output capacitance of the relay in the non-conductive condition.

Solid-state relay

To provide a semiconductor device having a large allowable current, a demanded withstand voltage, and small output capacitance and resistance, the semiconductor device comprises a semiconductor layer formed on a semiconductor substrate, and the semiconductor layer includes a first conductivity type-drain region, a second conductivity type-well region apart from the drain region, a first conductivity type-source region in the well region apart from one end of the well region on the side of the drain region, a first conductivity type-drift region formed between one end of the well region and the drain region and in contact with the well region and the drain region, respectively, and a gate electrode formed spaced a gate oxide layer and on the well region located between the drift region and the source region; and the impurity concentration of the drift region decreases in the lateral direction and also in the vertical direction, respectively, as the distance from the drain region increases.

Semiconductor device and process for producing the same

A thin film transistor of SOI (Silicon-On-Insulator) type includes a buried oxide layer formed on a semiconductor substrate, a silicon layer of a first conductive type formed on the buried oxide layer, and an upper oxide layer formed on the silicon layer. The silicon layer has a body region of a second conductive type, source region of the first conductive type, drain region of the first conductive type, and a drift region of the first conductive type. The silicon layer is formed with a first portion of a thickness T1 in which the doping region is formed, and a second portion of a thickness T2 in which the body region is formed to reach the buried oxide layer. When the thicknesses T1 and T2 are determined so as to satisfy the relationships:

Thin film silicon-on-insulator transistor having an improved power

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Hirakata, Japan

Takashi Kishida