Fujitsu Corporation

Fuji Xerox Co., Ltd.

Takashi Kawasaki

Keiji Ishiguro

Sumitake Kobayashi

Ken Murata

Hideki Kato

Chikara Tsuchiya

Kazuo Asakawa

Hideki Yoshizawa

Katsuya Ishikawa

Hiroki Iciki

Hiromu Iwamoto

Yoshihide Sugiura

Hiroyuki Tsuzuki

Toshiharu Matsuda

Tatsuru Miyata

Shigeo Ichikawa

Hideichi Endo

Fumitake Abe

Hideichi Endoh

A multifunction machine/server system capable of dealing with electronic documents at a higher efficiency and being actualized at low costs, is disclosed. The multifunction machine executes, when given a request for a second kind of process, the requested second kind of process without linkage with the server, and, when given a request for a first kind of process, requests the server to execute the first kind of process. The server incorporates a function of executing the first kind of processes that a plurality of multifunction machines request the server to execute. The multifunction machine/server system is constructed of the thus structured server and the plurality of thus structured multifunction machines.

Multifunction machine, server, multifunction machine/server system and program recording medium

A multi-function unit includes a printer engine, a logical copying machine carrying out a copying process with respect to a recording medium by the printer engine, and a plurality of logical printers carrying out printing processes with respect to the recording medium by the printer engine. The logical copying machine and the logical printers carry out apparent parallel operations.

Multi-function unit, server and network system having multi-function unit

It is intended to provide a composite machine-server system which can handle electronic documents more efficiently and can be realized at a low cost. A composite machine-server system is constructed by connecting a plurality of composite machines and a server to a network. Each of the composite machines has a second-kind process function of executing a second-kind process without cooperating with the server when requested to execute the second-kind process, as well as a first-kind process function of sending, when requested to execute a first-kind process, an electronic document necessary for execution of the first-kind process to the server and requesting the server to execute the first-kind process on the electronic document. The server has a function of executing first-kind processes whose execution is requested by the composite machines.

Composite machine, server, composite machine-server system, and program recording medium

An input analog data is applied to a plurality of neuron units in a time division manner. The analog input data is multiplied by digital weight data which can be changed in accordance with the data of the interconnection between units. The products of the time division analog input data and the digital weight data are added in an integrator. While the present sum of the products is output, the previous sum of the products is output simultaneously with the present data, thereby providing outputs in a pipe-line manner. When the output of the first neuron is produced, the second neuron in the same layer produces an output such that the output of the first layer is produced on the output analog bus in a time division manner. This analog neuron unit constitutes an intermediate layer and an output layer. One layer of neuron units can be repeatedly used by feeding back the output of one layer to the input of another layer, then the neuron system operates as a layered structure.

Neuron architecture

An error absorbing system for absorbing errors through a weight correction is provided in a neuron computer for receiving an analog input signal through a first analog bus in a time divisional manner, performing a sum-of-the-products operation, and outputting an analog output signal to a second analog bus. The error absorbing system includes a dummy node for producing a fixed voltage to an analog bus in a test mode. The dummy node is connected to the analog bus of the neural network. An error measuring unit compulsorily inputs 0 volts to the first analog bus through the dummy node in a first state of a test mode and detects an offset voltage produced in an analog neuron processor through the second analog bus. A weight correcting unit, in a second state of the test mode, determines a temporary weight between the dummy node and the neuron processor. The temporary weight is multiplied by the fixed voltage produced by the dummy node, based on an offset voltage of respective neuron processors. The weight correcting unit calculates a correct weight using a gain based on the detection output voltage output from the second analog bus. A weight memory stores the weight corrected by the weight correcting unit.

Error absorbing system in a neuron computer

Neurocomputer with analog signal bus

Growing community of inventors

Kawasaki, Japan

Takashi Kawasaki