Nec Corporation

Mitsubishi Electric Corporation

Nkk Corporation

Honda Motor Co., Ltd.

Stanley Electric Co., Ltd

Takashi Kanazawa

Akihito Ohno

Kenichi Hamano

Yasunori Yoshie

Masayuki Kimura

Yasuhiro Kimura

Masashi Sakai

Ryuichi Nakano

Yoichiro Mitani

Takuma Mizobe

To provide a vehicle headlight whose irradiation light is capable of ensuring sufficient illuminance to the immediate front side of the vehicle. A vehicle headlight irradiating light to the front of a vehicle including a first unit which generates light in order to form a first low beam, a second unit which generates light in order to form a high beam and a second low beam, where a portion of the high beam on the lower end side overlaps a portion of the first low beam on the upper side, and the other portion is formed above the first low beam without overlapping the first low beam, and where a portion of the second low beam on the upper side overlaps a portion of the first low beam on the lower side, and the other portion is formed below the first low beam without overlapping the first low beam.

Vehicle headlight

A silicon carbide epitaxial wafer manufacturing method includes: a stabilization step of nitriding, oxidizing or oxynitriding and stabilizing silicon carbide attached to an inner wall surface of a growth furnace; after the stabilization step, a bringing step of bringing a substrate in the growth furnace; and after the bringing step, a growth step of epitaxially growing a silicon carbide epitaxial layer on the substrate by supplying a process gas into the growth furnace to manufacture a silicon carbide epitaxial wafer.

Silicon carbide epitaxial wafer manufacturing method, silicon carbide semiconductor device manufacturing method and silicon carbide epitaxial wafer manufacturing apparatus

A semiconductor wafer includes a silicon carbide substrate having a first carrier concentration, a carrier concentration transition layer, and an epitaxial layer provided on the carrier concentration transition layer, the epitaxial layer having a second carrier concentration, and the second carrier concentration being lower than the first carrier concentration. The carrier concentration transition layer has a concentration gradient in the thickness direction. The carrier concentration decreases as the film thickness increases from an interface between a layer directly below the carrier concentration transition layer and the carrier concentration transition layer, and the carrier concentration decreases at a lower rate of decrease as the film thickness of the carrier concentration transition layer increases. The carrier concentration of the carrier concentration transition layer has the concentration gradient that falls within a predetermined concentration range lying between a first concentration gradient condition and a second concentration gradient condition.

Semiconductor wafer, semiconductor device, and method for producing semiconductor device

An apparatus for manufacturing an optical fiber cable covered with a metal pipe forms a metal pipe by abutting two sides of a metal strip to be pulled, introduces an optical fiber or an optical fiber bundle into the metal pipe, and seals the opening of the metal pipe by laser welding. A squeeze shoe is arranged immediately before a welding position. The inner circumferential surface of the squeeze shoe is brought into contact with the metal pipe, and the section of this inner circumferential surface conforms to the outer circumferential surface of the metal pipe. The squeeze shoe is vertically divided into halves. Since the squeeze shoe is provided immediately before the welding position, the opening of the metal pipe can have a predetermined width and be welded. The opening width is adjusted in accordance with at least one of a diameter, thickness and composition of the metal strip and in accordance with at least one of a welding rate, laser beam power and laser beam focus shift amount of the laser welder. Thus, thermal damage to the optical fiber can be reliably prevented, and defective welding caused by a spatter can be prevented, so that a long-time continuous operation is enabled. An elongated optical fiber cable covered with a metal pipe can be manufactured.

Method of manufacturing optical fiber cable covered with metal pipe, and

A method and apparatus for manufacturing a metal pipe-covered optical fiber cable perform extra length control of the metal pipe with respect to the optical fiber in accordance with length adjustment by reducing the diameter of the metal pipe while applying minimum tension or without applying any tension for extra length control to the optical fiber by means of a pair of rollers, so that a crack in the optical fiber is avoided and the service life of the optical fiber is prolonged.

A selector is arranged to choose one of first and second incoming data. The first data is a fraction of a divisor applied from external circuitry, while the second data is a binary normalized first data in the event that the first data is not normalized in terms of a radix of the first data. The data chosen by the selector is stored in a register. A first predetermined number of upper bits (5 bits for example) of a fraction held in the register is checked to see if the fraction is normalized in terms of a radix of the first data. In the event that the fraction of a divisor stored in the register is found to be normalized in terms of a radix of the first data, the amount of shifting necessary to binary normalize the first predetermined number of upper bits of a fraction is determined. The amount of shifting thus detected is used to shift or binary normalize a second predetermined number of upper bits of a fraction stored in the register. The second predetermined number of upper bits thus binary normalized is used to generate an approximated reciprocal of a divisor. On the other hand, in the event that a fraction stored in the register is found to be unnormalized in terms of a radix of the first data, the selector chooses the second data.

Method and arrangement of determining approximated reciprocal of binary

A method of exchanging information in a processing system including the steps of storing the internal state information of a first arithmetic processing unit upon occurrence of a fault into a system control unit, sending a processor relief instruction from the system control unit to a second arithmetic processing unit, suppressing the updating of the internal state information of the second arithmetic processing unit, storing the internal state information of the second processing unit into the system control unit, transferring the internal state information of the first arithmetic processing unit from the system control unit to the second arithmetic processing unit, and sending a reset and actuating signal from the system control unit to the second arithmetic processing unit.

Information processing system having microprogram-controlled type

A method of exchanging information in a processing system including the steps of issuing a clock synchronizing instruction from an operating system, holding the clock synchronizing instruction in a communication information holding unit, suppressing the updating of internal state information in a first arithmetic unit in response to the holding signal, outputting a communication demand signal from the communication information holding unit to a system control unit, freezing the updating of the calendar clock values in respective first and second arithmetic processing units, receiving in the system control unit the first clock value from the first arithmetic processing unit, storing the first calendar clock value in the second arithmetic processing unit, issuing a restarting signal to the arithmetic processing units, and issuing a microprogram actuating instruction to the arithmetic processing units from the system control unit.

An information processing system comprises at least one arithmetic processing unit operating under the control of a microprogram and a system control unit which exchanges information with the arithmetic processing unit. The system control unit is not required to perform distinction processing between one source of interruption, for example a fault notice, and another source of interruption, for example a clock synchronization demand.

For a plurality of logic units which are organized into scan-path groups, a scan-path self-testing circuit is provided which comprises a clock source and a plurality of gates for supplying the clock pulse to the logic units when selectively enabled. To give flexibility to group organization of the logic units, the gates are provided in a one-to-one relationship with the logic units. Bit positions of a register are associated respectively with the gates. A scan path controller selects one of the scan-path groups and writes a logic 1 into the register bit positions which are associated with the logic units of the selected scan-path group.

Scan-path self-testing circuit for logic units

A memory initialization system for initializing a memory content in response to a memory initialization instruction is disclosed. In this system, a memory initialization instruction validity control means for controlling validity of the memory initialization instruction is arranged. The memory initialization instruction validity control means can render the memory initialization instruction invalid so as to inhibit initialization for the memory.

Memory initialization system

In an electronic circuit for dividing a dividend (RR) by a divisor (RD) to calculate an eventual quotient (Q) divisible into first through N-th partial quotients, each being represented by a g-ary number, an approximate reciprocal (RC) of the divisor is read out of a memory (34) and multiplied in a first multiplication circuit (36) by the divisor to obtain a correction factor (C.sub.1). A second multiplication circuit (37) multiplies the dividend by the approximate reciprocal to calculate a first provisional quotient which is near to the eventual quotient and which is processed into a first partial provisional quotient (P.sub.1) and a second provisional quotient by a first adder circuit (61) and a second partial divider (64.sub.1), respectively. The first partial provisional quotient is modified into the first partial quotient Q.sub.1 with reference to the second provisional quotient in a first correction circuit (66.sub.1). Likewise, an i-th partial quotient (Q.sub.1) except the first partial quotient is successively produced from an i-th correction circuit (66.sub.i) by modifying an i-th partial provisional quotient (P.sub.i) with reference to an (i+1)-th provisional quotient. Thus, the first through the N-th partial quotients successively appear from the first through the N-th correction circuits and are synchronously produced as the eventual quotient from a synchronization circuit (105).

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Tokyo, Japan

Takashi Kanazawa