Minolta Camera Kabushiki Kaisha

Takashi Kadono

Masaaki Nishiyama

Takashi Morikawa

Yoshikazu Ikenoue

In an image forming apparatus for receiving image data sent from an external apparatus and forming an image of dot image data on a printing paper, there is provided a bit map memory for storing dot image data of one page and a buffer memory for storing dot image data of a predetermined amount. In the image forming apparatus, dot image data are read out from the bit map memory in a unit of one scan line and are written in the buffer memory, and dot image data are read out from the buffer memory and are outputted to a printer engine. A start signal for representing start of forming dot images is generated every one scan line and is outputted to the printer engine, and the writing timing of the writing operation is controlled in response to the start signal.

Synchronously transferring image data to a printer

In a system including a main body for processing data and a memory detachably provided to the main body, an addressing method for addressing the memory to write data therein or to read data therefrom being that plural bits of an address to be applied to the memory from the main body are divided into two parts, one part of address bits is transmitted to the memory through an address line provided for addressing the memory while another part of address bits is transmitted to the memory through a data line provided for communicating data between the main body and the memory, and two parts of address bits are joined in the memory to access the memory by full bits of the address.

Addressing system for a memory unit

A beam scan type recording apparatus for scanning a laser beam periodically on a photosensitive medium for recording a visible image comprised of dot images is disclosed. In the recording apparatus, numerical data representing time interval between emission timings of the laser beam corresponding to respective dot images are stored in a memory. A dot clock counter outputs a dot clock signal when the counting value thereof agrees with a value preset from the memory, and a laser is driven so as to emit the laser beam according to image data in synchronous with the dot clock signal.

Beam scan type recording apparatus with electrically F theta correcting

A printer font memory including a SRAM (Static Random Access Memory) and a DRAM (Dynamic Random Access Memory). Font data received from an external apparatus is stored in the DRAM. A set of font data to be used for printing is transferred from the DRAM to the SRAM. Character code data received from the external apparatus is converted into bit images corresponding to the received character code data using the font data stored in the SRAM in order to print the bit images.

Printer for converting character codes into bit images

A character generator for generating character patterns based on pattern data stored in a font memory held in at least one font cartridge which is detachably loaded in the character generator. The font memory is divided into a plurality of banks each of which has a predetermined memory capacity. Every font data includes global information data which indicates at least a kind and memory volume thereof together with character pattern data. The global information data is stored in a predetermined area of a bank into which font data are to be stored at first. A font management means is provided for managing a plurality of fonts stored in each font cartridge by accessing global information stored in the font memory.

Character generator

Clocking circuitry for a character generator wherein a control microprocessor controls character generated by hardwired logic through an interface microprocessor, the clocking circuitry including an oscillator which supplies an output to a divider which supplies a reduced frequency signal to the control microprocessor. The output of the oscillator is also supplied to the output of a timing controller. The timing controller further receives a print signal from the interface microprocessor and supplies a plurality of timing signals to the hard wired logic character generator.

Character generator with clocking circuitry

The memory device of this invention comprises a plurality of banks to which common address/data lines are connected, bank-selecting means for selectively feeding data read/write control signals to each bank, and a plurality of circuits for simultaneously feeding control signals to all banks, so that above constitution allows the memory device to simultaneously feed control signals to all the banks when erasing the entire memory content, thus making it possible for the memory device to effectively erase the entire memory content at an extremely high speed.

Memory device

A signal processing device comprises buffer memory means for outputting a coded signal in parallel by a signal of predetermined bits, shifting means for shifting the coded signal so that the head bit of the coded signal become the head of the outputted signal, decoding memory means for decoding the coded signal to a run length signal having information of the run length of the coded signal, and outputting a shifting signal designating a bit number of the coded signal corresponding to the number to be shifted, into said shifting means. Accordingly, said signal processing device enables to decode a coded signal at a higher speed than a conventional image signal processing device and to output an image signal into an electrophotographic printer or a CRT display, synchronizing with a processing speed of the electrophotographic printer or a sub scanning speed of the CRT display.

Image signal processing device

A character generator, comprising: a font memory for storing dot patterns of fonts; a first-in first-out memory for loading dot pattern data in unit of one byte successively, which generates a load request signal when the memory has empty spaces; an input control unit for accessing a dot pattern of a font to be printed and for transmitting a dot array data of one byte to the first-in first-out memory when the load request signal is received; and an output control unit for sending an output request signal to the first-in first-out memory to receive dot array data from the first-in first-out memory, and for transmitting the dot array data to a dot-image printer synchronously with a load request signal from the dot-image printer.

Growing community of inventors

Osaka, Japan

Takashi Kadono