Renesas Electronics Corporation

Sumitomo Electric Industries, Limited

Kabushiki Kaisha Toshiba

Sumitomo Wiring Systems, Limited

Toshiba Memory Corporation

Autonetworks Technologies, Limited

Takashi Ide

Hiroshi Kimura

Hideaki Tsuchiya

Yorinobu Kunimune

Yoshihisa Kojima

Kiyotaka Iwasaki

Daiki Nagayasu

Kouji Watanabe

Tomoko Matsuda

Makoto Moriya

Hiroyuki Nanjou

Yasuhiro Okamoto

Housei Mizuno

Tetsuya Nishimura

Haruka Nakano

Motohiro Yokoi

Tsutomu Sakata

Daisuke Ebata

Shuzo Suzuki

Shigeki Ikeda

Yuichi Toda

Katsuji Sakamoto

Daisuke Fukai

Junya Yonekawa

Akio Ohta

A memory system includes a nonvolatile memory, a memory controller included in a first package, and a memory interface circuit included in a second package that is different from the first package. The memory controller includes an encoder for performing encoding for error correction. The memory controller is configured to encode first data into second data using the encoder, and program the second data into a location in the nonvolatile memory. The memory interface circuit is interposed between the memory and the memory controller. The memory interface circuit includes a decoder for performing decoding for error correction. The memory interface circuit is configured to read third data from a first location in the nonvolatile memory, diagnose the third data by decoding the third data using the decoder, and convey a result of the diagnosis to the memory controller.

Memory system

A support member-attached wire harness includes a wire harness including an electrical wire and a support member that includes a fitting portion formed in a partially cylindrical shape that is opened partially in a circumferential direction so as to be capable of being fitted to an outer peripheral portion of a bar-shaped member. On at least one of the wire harness and the support member, a support portion for supporting the wire harness disposed along an outer periphery of the fitting portion at a fixed position with respect to the fitting portion is formed.

Support member-attached wire harness and wire harness support structure

An object of the present invention is to reduce the constraints on the mounting of a wire protecting protector to a wire, while achieving a reduction in the weight of the wire protecting protector. A wire protecting protector is made of a foamed resin and is formed in a shape having a wire housing recess capable of housing a wire, and a surface of the wire protecting protector that includes an inner circumferential surface on the wire housing recess side is a surface formed through molding. Preferably, a reinforcing film is formed on at least a part of the surface of the wire protecting protector.

Wire protecting protector and protector-equipped wire

Characteristics of a semiconductor device are improved. A method of manufacturing a semiconductor device of the invention includes a step of forming a gate insulating film over a nitride semiconductor layer. The step includes steps of forming a crystalline AlOfilm on the nitride semiconductor layer, forming a SiOfilm on the AlOfilm, and forming an amorphous AlOfilm on the SiOfilm. The step further includes steps of performing heat treatment on the amorphous AlOto crystallize the amorphous AlO, thereby forming a crystalline AlOfilm, and forming a SiOfilm on the crystalline AlOfilm. In this way, since a film stack, which is formed by alternately stacking the crystalline AlOfilms and the SiOfilms from a bottom side, is used as the gate insulating film, threshold voltage can be cumulatively increased.

Method of manufacturing semiconductor device and the semiconductor device

To enhance electromigration resistance of an electrode. A drain electrode is partially formed on a side surface of a drain pad. In this case, the drain electrode is integrated with the drain pad and extends from the side surface of the drain pad in a first direction (y direction). A recessed portion is located in a region overlapping with the drain electrode in a plan view. At least a part of the drain electrode is buried in the recessed portion. A side surface of the recessed portion, which faces the drain pad, enters the drain pad in the first direction (y direction).

Semiconductor device

According to embodiments, a memory system includes a plurality of memory chips configuring banks, an instruction generator, and a memory controller. The instruction generator generates a plurality of instructions. The memory controller is configured to execute memory accesses to the banks based on the instructions. Each memory access comprises a first command sequence and a second command sequence. The first command sequence causes in-bank processing shortly subsequent to the first command. The second command sequence is executed subsequent to the in-bank processing. The memory controller executes successively a second command sequence to a first bank based on a first instruction and a first command sequence to the first bank based on a second instruction subsequent to the first instruction, and then starts a memory access to a second bank based on a third instruction while the first bank is executing the in-bank processing caused by the first command sequence.

Memory system and bank interleaving method

According to one embodiment, a controller includes a first command queuing part corresponding to a first bank, the first command queuing part queuing a first command, a second command queuing part corresponding to a second bank, the second command queuing part queuing a second command, and a command execution control part which is configured to generate a first sub-command sequence based on a group of commands in the first command, generate a second sub-command sequence based on a group of commands in the second command, and determine whether or not to execute the first and second sub-command sequences in parallel as an interleave operation between the first and second banks, by comparing an additional value of a first numeric converted parameter of the first sub-command sequence and a second numeric converted parameter of the second sub-command sequence with a threshold data.

Controller controlling an interleave operation, solid-state drive including the controller, and control method controlling an interleave operation

A semiconductor device includes a silicon substrate, and a NiSi layer provided on the silicon substrate aiming to suppress oxidation of the surface of a NiSi layer and the resistivity increase. The NiSi layer includes a bottom NiSi region and a top NiSi region. The bottom NiSi region provided in contact with silicon surface, and containing substantially no nitrogen. The top NiSi region is a nitrided NiSi region provided in contact with the bottom NiSi region, and containing nitrogen. The NiSi layer has a total thickness of 50 nm or below.

Semiconductor device and method of manufacturing the same

An optical fiber characteristic measuring device for automatically measuring, at successive measuring stages, various characteristics of optical fiber samples. Each measuring stage has optical system incident and emergent ends. An optical fiber sample is set in a carrier which moves from measuring stage to measuring stage. At each stage the set fiber sample is coupled to the incident and emergent ends of the stage and automatically subjected to the measurement to which the stage is dedicated. Bending units provide a desired degree of curvature to the fiber sample under test to control light propagation therein.

Optical fiber characteristic measurement

An optical fiber characteristic measuring method and apparatus are disclosed whereby measurements of a plurality of different parameters of an optical fiber can be carried out automatically and successively with a minimum of operator time required. A stage is provided which is movable along a straight line, and a setting station is arranged in the direction of movement of the stage. A plurality of measurement stations are provided having first holders for holding fibers provided on the side of the measuring devices and arranged along a straight line extending parallel to the direction of movement of the stage with a predetermined distance therebetween. The stage is provided with a plurality of second holders for holding the optical fibers to be measured, with the second holders being arranged along a straight line extending parallel to the direction of arrangement of the first holders with the same distance as the predetermined distance therebetween.

Optical fiber characteristic measuring method and apparatus

Growing community of inventors

Kanagawa, Japan

Takashi Ide