Renesas Electronics Corporation

Nec Electronics Corporation

Nec Corporation

Mitsubishi Chemical Corporation

Citizen Electronics Co., Ltd.

Nichia Corporation

Other

Omron Tateisi Electronics Co.

Takashi Hase

Naoto Kijima

Byungchul Hong

Masahiko Yoshino

Kentarou Horibe

Naoki Sako

Fumiko Yoyasu

Makoto Ueki

Yoshihiro Hayashi

Ippei Kume

Koji Masuzaki

Takashi Nakagawa

Toshiharu Nagumo

Kiyoshi Takeuchi

Tadatoshi Danno

Hiroshi Takeda

Yoichi Miyasaka

Kiyoto Mori

Naoya Furutake

Yasuo Shimomura

Yutaka Mori

Tomoyuki Kurushima

Keiichi Seki

Eiji Hattori

Takashi Onizawa

Masaharu Matsudaira

Hayato Katsuragi

Taku Yamate

Kazuhiro Mizunaga

Takashi Ohno

Norio Tsuchitani

Akio Toshinai

Shigeru Hirao

Tomoko Takahashi

Nobuhiro Kodama

Kouichi Adachi

Toshinobu Shinnai

Hiroshi Morioka

To provide a semiconductor light emitting device which is capable of accomplishing a broad color reproducibility for an entire image without losing brightness of the entire image. A light source provided on a backlight for a color image display device has a semiconductor light emitting device comprising a solid light emitting device to emit light in a blue or deep blue region or in an ultraviolet region and phosphors, in combination. The phosphors comprise a green emitting phosphor and a red emitting phosphor. The green emitting phosphor and the red emitting phosphor are ones, of which the rate of change of the emission peak intensity at 100° C. to the emission intensity at 25° C., when the wavelength of the excitation light is 400 nm or 455 nm, is at most 40%.

Light emitting device

To provide a semiconductor light emitting device which is capable of accomplishing a broad color reproducibility for an entire image without losing brightness of the entire image. A light source provided on a backlight for a color image display device has a semiconductor light emitting device comprising a solid light emitting device to emit light in a blue or deep blue region or in an ultraviolet region and phosphors, in combination. The phosphors comprise a green emitting phosphor and a red emitting phosphor. The green emitting phosphor and the red emitting phosphor are ones, of which the rate of change of the emission peak intensity at 100&#xb0; C. to the emission intensity at 25&#xb0; C., when the wavelength of the excitation light is 400 nm or 455 nm, is at most 40%.

Illumination device

To provide a semiconductor light emitting device which is capable of accomplishing a broad color reproducibility for an entire image without losing brightness of the entire image. A light source provided on a backlight for a color image display device has a semiconductor light emitting device comprising a solid light emitting device to emit light in a blue or deep blue region or in an ultraviolet region and phosphors, in combination. The phosphors comprise a green emitting phosphor and a red emitting phosphor. The green emitting phosphor and the red emitting phosphor are ones, of which the rate of change of the emission peak intensity at 1000 C to the emission intensity at 25&#xb0; C., when the wavelength of the excitation light is 400 nm or 455 nm, is at most 40%.

Semiconductor light emitting device, backlight, color image display device and phosphor to be used for them

A resistance change element includes first and second electrodes spaced apart from each other, a metal material layer adjacent to the first electrode, an oxide layer adjacent to each of the metal material layer and the first electrode, and a resistance change layer disposed continuously between the second and first electrodes and between the second electrode and the oxide layer. The resistance change layer is made of a metal oxide. The metal material layer is made of a metal or a metal compound. The oxide layer is made of an oxide of the material forming the metal material layer. The first electrode is made of ruthenium, ruthenium oxide, iridium, iridium oxide, platinum, gold, or copper. A free energy of oxide formation of the oxide forming the oxide layer is higher than a free energy of oxide formation of the oxide forming the resistance change layer.

Resistance change memory device

A semiconductor device has a resistance change element that is high in the holding resistance of a low resistance (On) state while securing a memory window. In a resistance random access memory including selection transistors and resistance change elements coupled in series to the selection transistors, the resistance change element uses a lower electrode that applies a positive voltage when being transited to a high resistance (Off) state, an upper electrode that faces the lower electrode, and a resistance change layer that is sandwiched between the lower electrode and the upper electrode and that uses an oxide of transition metal. The resistance change layer contains nitrogen. The concentration of nitrogen on the lower electrode side is higher than that on the upper electrode side. The nitrogen in the resistance change layer exhibits a concentration gradient continuously declined from the lower electrode side to the upper electrode side.

Semiconductor device and manufacturing method thereof

When writing ReRAM cells, it is pursued to set the cells in a sufficiently high or low resistance state, while preventing excessive writing. Disclosed is a semiconductor storage device including memory cells, each including a variable resistance element, and control circuitry that executes an Off writing process of applying Off writing pulse to a memory cell to turn it into high resistance state and an On writing process of applying On writing pulse to turn it into low resistance state. The control circuitry, when the memory cell is placed in low resistance state, after applying Off writing pulse, applies a reading pulse for a verify process of reading whether it is placed in high or low resistance state. If the memory cell is not placed in high resistance state as a result of the verify process, the control circuitry applies a reset pulse comprising On writing pulse, applies Off writing pulse with extended pulse width and executes the verify process in mentioned order.

Semiconductor storage device

Included are memory cells each including a resistance change element and a control circuit. The circuit performs an On writing process for applying, to the memory cell, an On writing pulse for the cell to be in a resistance state where a resistance value of the resistance change element is lower than a first reference value and an Off writing process for applying an Off writing pulse with an opposite polarity to the On writing pulse for a high resistance state with a second reference value or greater. The circuit applies, in the On writing process, a trial pulse having the same polarity as that of the On writing pulse and having the pulse width shorter than that of the On writing pulse and a reset pulse having the same polarity as that of the On writing pulse, in this order before applying the On writing pulse to the cell.

Semiconductor memory device including a resistance change element and a control circuit for changing resistance of the resistance change element

Performance of a semiconductor device is improved. The semiconductor device includes a substrate composed of silicon, a semiconductor layer composed of p-type nitride semiconductor provided on the substrate, and a transistor including a channel layer provided on the semiconductor layer. The semiconductor device further includes an n-type source region provided in the channel layer, and an n-type drain region provided in the channel layer separately from the source region in a plan view. Each of the source region and the drain region is in contact with the semiconductor layer.

High-electron-mobility transistor with protective diode

To improve information retention resistance of a resistance change memory which requires high information retention resistance. On the assumption that a special data storage memory and a general-purpose data storage memory are distinguished from each other, a forming operation small in resistance rise rate is used for an information writing operation of the special data storage memory. A switching operation is used for information writing of the general-purpose data storage memory. That is, the special data storage memory is configured so as to store information while adapting an initial resistance state to '0' whereas adapting a low resistance state to '1'. On the other hand, the general-purpose data storage memory is configured so as to store information while adapting a high resistance state to &#x201c;0&#x201d; whereas adapting a low resistance state to &#x201c;1&#x201d;.

Semiconductor device and operating method thereof

To realize a transistor of normally-off type having a high mobility and a high breakdown voltage. A compound semiconductor layer is formed over a substrate, has both a concentration of p-type impurities and a concentration of n-type impurities less than 1&#xd7;10/cm, and includes a group III nitride compound. A well is a p-type impurity layer and formed in the compound semiconductor layer. A source region is formed within the well and is an n-type impurity layer. A low-concentration n-type region is formed in the compound semiconductor layer and is linked to the well. A drain region is formed in the compound semiconductor layer and is located on a side opposite to the well via the low-concentration n-type region. The drain region is an n-type impurity layer.

Semiconductor device with group-III nitride compound semiconductor layer on substrate for transistor

Sometimes to warp a group III nitride semiconductor and a silicon by the stress of the group III nitride semiconductor acting on the silicon. A semiconductor device includes a substrate, a buffer layer, and a semiconductor layer. A trench is formed on a sixth face of the semiconductor layer. The trench passes through the semiconductor layer and the buffer layer. The bottom of the trench reaches at least the inside of the substrate.

Semiconductor device

Growing community of inventors

Kanagawa, Japan

Takashi Hase