Oki Electric Industry Co., Ltd.

Takashi Hamamoto

Yasuhiro Shin

The output of a differential amplifier circuit group (PA) that amplifies signals inputted to input PINs is connected to a final-stage differential amplifier circuit (PAn). The output of the differential amplifier circuit (PAn) is connected to a detection (DET) circuit. A detect signal sent from the DET circuit is outputted to the (&#x2212;) side input of a comparator. A bias signal (BP) outputted from a bias circuit is inputted to the base of a PMOS transistor of a source follower circuit. An output signal (SFOUT) outputted from a source terminal thereof is inputted to the (+) side input of the comparator. A result of comparison between the bias signal (BP) and the output signal (SFOUT) is outputted from the comparator as an output signal (COMPOUT).

Semiconductor integrated circuit

A drive voltage generating circuit outputs drive signals having voltage levels which is controlled by a second control signal is disclosed. A drive voltage generating circuit according to the present invention comprises drive output terminals for outputting drive signals having voltage levels, a bias circuit having a first voltage terminal to be applied to a first voltage and a second voltage terminal to be applied to a second voltage. The bias circuit produces voltage signals having the drive voltage levels. A drive voltage generating circuit according to the present invention further comprises a switching circuit having input terminals coupled to the bias circuit, output terminals coupled to the drive output terminals and a control terminal receiving a first control signal, a bias potential control circuit coupled between the second voltage terminal and a third voltage terminal to be applied to a third voltage. The bias potential control circuit includes a first voltage control circuit controlling a resistance value between the second and third voltage terminals in response to contrast data signals and a second voltage control circuit controlling the resistance value between the second and third voltage terminals in response to a second control signal.

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Osaka, Japan

Takashi Hamamoto