Semiconductor Energy Laboratory Co., Ltd.

Olympus Corporation

Matsushita Electric Industrial Co., Ltd.

Sharp Kabushiki Kaisha Corporation

Olympus Imaging Corporation

Takashi Hamada

Shunpei Yamazaki

Satoshi Seo

Yoshiharu Hirakata

Shinya Sasagawa

Daisuke Kubota

Tetsuji Ishitani

Yasuyuki Arai

Motomu Kurata

Masaharu Nagai

Mitsuaki Osame

Satoshi Murakami

Aya Anzai

Osamu Nakamura

Yasuhiro Jinbo

Yu Yamazaki

Tamae Takano

Ryo Hatsumi

Kohei Yokoyama

Naoto Yamade

Masaru Nakano

Toru Takayama

Junichi Koezuka

Masayuki Sakakura

Akihisa Shimomura

Daisuke Matsubayashi

Yoshiaki Yamamoto

Yutaka Okazaki

Yasumasa Yamane

Satoshi Toriumi

Hiroaki Honda

Masayuki Kajiwara

Daigo Ito

Hiroki Komagata

Yoshiyuki Kurokawa

Junichiro Sakata

Takayuki Ikeda

Atsuo Isobe

Satoru Okamoto

Katsuaki Tochibayashi

Tetsunori Maruyama

Yuki Imoto

Yoshihiro Komatsu

Taiga Muraoka

Yuji Asano

Noriko G Tanaka

Yutaka Matsuda

Ryunosuke Honda

Hiroshi Uranaka

Kazuko Yamawaki

Osamu Nonaka

Hidekazu Miyairi

Masahiko Hayakawa

Kosei Noda

Shuhei Nagatsuka

Junpei Momo

Munehiro Kozuma

Mitsuhiro Ichijo

Kaoru Hatano

Hikaru Tamura

Yusuke Nonaka

Tetsuya Kakehata

Naoki Makita

Akira Iwamoto

Masashi Oota

Yuji Egi

Noritaka Ishihara

Shoji Okazaki

Takuya Matsuo

Tsutomu Murakawa

Masaomi Tomizawa

Takeshi Kindaichi

Saori Matsumoto

Keito Fukushima

Yoshinori Ando

Akinobu Sato

Hiromitsu Katsui

Suguru Ozawa

Yoichi Kurosawa

Katsumi Nomura

Akira Yukitake

Hiroki Amino

Takashi Shingu

Masatoshi Noda

Akio Uesugi

Yoshinori Yamada

Shota Mizukami

Noriko Harima

Satsuki Ishibashi

Kikuo Miyata

Noriko Matsumoto

Takanaru Kobayashi

A semiconductor device in which variation of characteristics is small is provided. A second insulator, an oxide, a conductive layer, and an insulating layer are formed over a first insulator; a third insulator and fourth insulator are deposited to be in contact with the first insulator; a first opening reaching the oxide is formed in the conductive layer, the insulating layer, the third insulator, and the fourth insulator; a fifth insulator, a sixth insulator, and a conductor are formed in the first opening; a seventh insulator is deposited over the fourth insulator, the fifth insulator, and the sixth insulator; a mask is formed in a first region over the seventh insulator in a top view; oxygen is implanted into a second region not overlapping the first region in the top view; heat treatment is performed; a second opening reaching the fourth insulator is formed in the seventh insulator; and heat treatment is performed.

Semiconductor device and manufacturing method thereof

To provide a semiconductor device with less variations in characteristics. The semiconductor device includes a first circuit region and a second circuit region over a substrate, where the first circuit region includes a plurality of first transistors and a first insulator over the plurality of first transistors; the second circuit region includes a plurality of second transistors and a second insulator over the plurality of second transistors; the second insulator includes an opening portion; the first transistors and the second transistors each include an oxide semiconductor; a third insulator is positioned over and in contact with the first insulator and the second insulator; the first insulator, the second insulator, and the third insulator inhibit oxygen diffusion; and the density of the plurality of first transistors arranged in the first circuit region is higher than the density of the plurality of second transistors arranged in the second circuit region.

Semiconductor device

A display device in which a peripheral circuit portion has high operation stability is provided. The display device includes a first substrate and a second substrate. A first insulating layer is provided over a first surface of the first substrate. A second insulating layer is provided over a first surface of the second substrate. The first surface of the first substrate and the first surface of the second substrate face each other. An adhesive layer is provided between the first insulating layer and the second insulating layer. A protective film in contact with the first substrate, the first insulating layer, the adhesive layer, the second insulating layer, and the second substrate is formed in the vicinity of a peripheral portion of the first substrate and the second substrate.

Display device, manufacturing method of display device, and electronic device

A display device including a peripheral circuit portion with high operation stability. The display device includes a first substrate and a second substrate. A first insulating layer is on a first plane of the first substrate, and a second insulating layer is on a first plane of the second substrate. An area of the first plane of the first substrate is the same as an area of the first plane of the second substrate. The first plane of the first substrate and the first plane of the second substrate face each other. A bonding layer is between the first insulating layer and the second insulating layer. A protection film is in contact with the first substrate, the first insulating layer, the bonding layer, the second insulating layer, and the second substrate.

Display device and electronic device

To provide a semiconductor device with less variations, a first insulator is deposited; a stack of first and a second oxides and a first conductor is formed over the first insulator; a second insulator is formed over the first insulator and the stack; an opening is formed in the second insulator; a top surface of the second oxide is exposed by removing a region of the first conductor, second and third conductors are formed over the second oxide, and then cleaning treatment is performed; a first oxide film is deposited in contact with a side surface of the first oxide and top and side surfaces of the second oxide; heat treatment is performed on an interface between the second oxide and the first oxide film through the first oxide film; and the second insulator is exposed and a fourth conductor, a third insulator, and a third oxide are formed in the opening.

Method for manufacturing semiconductor device

A minute transistor is provided that includes a first insulator, a second insulator, a first, conductor, a second conductor, and third conductor, in which an angle is formed between a side surface of the first insulator and a top surface of the first conductor, and a length between the first conductor and a surface of the second conductor closest to the first conductor is at least greater than a length between the first conductor and the third conductor.

Semiconductor device and manufacturing method of the same

A high-performance semiconductor device is provided. The semiconductor device includes a transistor, an insulating film over the transistor, an electrode, and a metal oxide over the insulating film. The transistor includes a first gate electrode, a first gate insulating film over the first gate electrode, an oxide over the first gate insulating film, a source electrode and a drain electrode electrically connected to the oxide, a second gate insulating film over the oxide, and a second gate electrode over the second gate insulating film. The electrode includes a region in contact with the insulating film. The first gate insulating film is in contact with the insulating film. The thicknesses of the insulating film over the second gate electrode, the insulating film over the source electrode, and the insulating film over the drain electrode are substantially the same, and the insulating film includes excess oxygen.

A minute transistor with low parasitic capacitance, high frequency characteristics, favorable electrical characteristics, stable electrical characteristics, and low off-state current is provided. A semiconductor device includes a semiconductor over a substrate, a source and a drain over the semiconductor, a first insulator over the source and the drain, a second insulator over the semiconductor, a third insulator in contact with a side surface of the first insulator and over the second insulator, and a gate over the third insulator. The semiconductor includes a first region overlapping with the source, a second region overlapping with the drain, and a third region overlapping with the gate. The length between a top surface of the third region of the semiconductor and a bottom surface of the gate is longer than the length between the first region and the third region.

An imaging device, comprising an image sensor, an imaging control circuit that controls an integration time of the image sensor, and a controller comprising a flicker component detection section that detects flicker components, and a flicker determination section that determines existence of flicker, wherein the flicker component detection section is provided with a plurality of detection regions in an imaging region of the image sensor along a scanning direction for an electronic shutter function, and detects flicker components from differences in brightness relating to the same detection region based on a plurality of imaging outputs that have been acquired by performing integrating at the same integration time with different frames, and the flicker determination section changes a determination value for determining the existence of flicker in accordance with an imaging mode, and performs determination by comparing the flicker component and the determination value.

Imaging device and flicker determination method

Growing community of inventors

Kanagawa, Japan

Takashi Hamada