Kabushiki Kaisha Toshiba

Kabushiki Kashiba Toshiba

Takashi Fujiwara

Hideo Matsuda

Michiaki Hiyoshi

Hisashi Suzuki

Yasunori Usui

Susumu Iesaka

Takeomi Yoshida

Mitsuhiko Kitagawa

Hiroshi Okamura

Satoshi Yanagisawa

Mitsuo Sato

Kiyoshi Yoshikawa

Yoshinari Uetake

Yoshio Yokota

Kazuo Watanuki

Masami Iwasaki

Yoshiaki Tsunoda

Youji Miyasako

Hisayoshi Muramatsu

Tatuo Harada

In a suppresser circuit, a first voltage-to-current converting circuit converts an input voltage signal to an output current signal. A second voltage-to-current converting circuit has a non-inverting input terminal for receiving a predetermined bias potential and an inverting input terminal for receiving the input voltage signal. A current-limiting element is connected between the first and second voltage-to-current converting circuits, for substantially stopping a flow of current between the first and second voltage-to-current converting circuits while the input voltage signal remains at a level equal to or lower than the bias potential, and for decreasing the output current of the first voltage-to-current converting circuit while the input voltage signal remains at a level higher than the bias potential.

Suppresser circuit

The present invention provides a limiter amplifier using a differential pair of MOS transistors in an input stage. A plurality of MOS transistors each having a drain and a gate connected to each other as a load transistor, are connected in series to the drains of the differential pair of MOS transistors in the input stage. MOS transistors are current-mirror-connected to the load transistors to perform feedback on the differential pair of MOS transistors in the input stage. The outputs of the differential pair of MOS transistors in the input stage are amplified by another differential pair of MOS transistors in an output stage.

Analog signal amplifier circuit using a differential pair of MOSFETs (insulated-gate field effect transistors) in an input stage

Provided is a circuit arrangement for attaining an all-pass filter characteristics which have been conventionally attained by bipolar transistors, by using MIS transistors. An alternating-current signal is input to an input terminal of an inversion circuit having a two-fold amplification function through a low-pass filter. When output from the inversion circuit is input to a gate of a lower transistor of two MIS transistors cascaded and an inverted signal of the alternating-current signal is input to a gate of an upper transistor of the two MIS transistors cascaded, the alternating-current signal is subtracted from the output from the inversion circuit. In this manner, the all-pass filter is formed.

Filter circuit

In the present invention, by virtue of heat buffer plates respectively located on the major surfaces of IGBT chips and FRD chips arranged in a single plane, the total thickness of each chip and a corresponding one of the heat can be set to a substantially predetermined value. A thickness-correcting member having elongated projections corresponding to the chips is provided on those surfaces of the heat buffer plates which is remote from the chips. A heat buffer disk plate is provided on those surfaces of the chips which are opposite to the major surfaces thereof. The thickness-correcting member, the heat buffer plates and the IGBT and FRD chips are held and simultaneously pressed between an emitter press-contact electrode plate and a collector press-contact electrode plate. Before using the device, a force of press, which is higher than that applied at the time of using the device and can plastically deform the thickness-correcting member, is applied to the emitter press-contact electrode plate and the collector press-contact electrode plate, thereby correcting variations in total thickness of each semiconductor chip and a corresponding one of the heat buffer plates.

Multichip press-contact type semiconductor device

A reverse conducting gate-turnoff thyristor includes a switching device section, a diode section, and an isolating section located between the switching device section and the diode section. The isolating section includes an impurity layer formed by controlling impurity diffusion and having an impurity concentration lower than those of the switching device section and the diode section.

Reverse conducting gate-turnoff thyristor

A press-contact type semiconductor device having multiple semiconductor substrates, a periphery of which being enclosed by a chip frame of insulating resin a first electrode plate and a second electrode plate. The semiconductor substrates are arranged on a plane so as to abut against the chip frame. The semiconductor substrates are press-contacted from the upper and the lower sides by the first electrode plate and the second electrode plate.

Press-contact type semiconductor devices

A chroma noise reduction device comprises an 1H delay element, first and second variable delay units, variable amplifier, first and second adder amplitude restricting circuit, first and second subtracters and first, second and third phase detectors. The first phase detector compares the phases of a delay signal of a second variable delay unit and chroma signal supplied to the second variable delay unit and controls the second variable delay circuit to have the phase of the delay signal 90.degree.-delayed relative to the chroma signal. The second phase detector compares the phases of the delay signal and output signal of the variable amplifier and controls the phase of the first variable delay unit in response to a result of comparison. The third phase detector compares the phases of a sum signal of the delay signal and output signal of the variable amplifier and a difference signal of the delay signal and output signal of variable amplifier and controls the amplitude of the variable amplifier.

Chroma noise reduction device

In a semiconductor device, a pellet electrode, which is formed on a mesa-shaped pellet, and an external electrode, with which a package is provided, are in pressure-contact with each other. A soft-metal plate which has projections along its surface is arranged between the external electrode and the pellet electrode.

Press-contact type semiconductor device

A semiconductor device includes a substrate of a first conductivity type. A first layer of a second conductivity type is formed on one surface of the substrate of the first conductivity type. A second layer of the first conductivity type is formed on the first layer of the second conductivity type. A third layer of the first conductivity type is selectively formed on the other surface of the substrate of the first conductivity type. A fourth layer of the second conductivity type is formed on the other surface of the substrate of the first conductivity type. The vertical dimension of the fourth layer falls within a range of 5 to 20 .mu.m and is smaller than that of the first layer.

Finely controlled semiconductor device and method of manufacturing the

A crimp-type semiconductor device is provided with a semiconductor substrate having a lifetime-controlled region. This lifetime-controlled region is in the form of a ring, and the lifetime of the minority carriers is shortened in the region. Second-conductivity type impurity regions, which serve as emitter layers, are formed on the semiconductor substrate such that they provide a plurality of concentric arrays. The inner diameter of the ring-like lifetime-controlled region is longer than the diameter of an enveloping circle which is obtained by connecting the radially-inner ends of the impurity regions of the outermost array.

Crimp-type power semiconductor device

Finely controlled semiconductor device

A gate turn-off thyristor of the crimp and anode shortcircuit type includes a semiconductor pellet having anode, cathode and gate electrodes formed on each of first and second main surfaces thereof, with the gate electrode entering into the cathode electrodes. First and second electrode members are positioned sandwiching the semiconductor pellet between them and opposing to the electrodes. First and second electrode posts are positioned sandwiching the semiconductor pellet and the electrode members between them and opposing to the electrode members. Those faces of the electrodes, electrode members and electrode posts which are opposed to one another are not fixed but contact-pressed to one another. The semiconductor pellet has at the outer rim portion thereof a region where no current flows. The outer rim of each of the electrode member and post terminates on the region through which no current flows.

Crimp-type semiconductor device having non-alloy structure

A crimp-type semiconductor device having a non-alloy structure according to this invention has a silicon pellet including a plurality of cathode electrodes and a plurality of gate electrodes arranged to be alternately staggered with the cathode electrodes at the cathode side, and an anode electrode at the anode side. The cathode electrodes are crimped by a cathode electrode post via an electrode member constituted by a thin soft-metal plate and a hard metal plate. The anode electrode is crimped by an anode electrode post via an electrode member. Opposing surfaces of the electrodes, the electrode members, and the electrode posts are not bonded to but crimped in contact with each other. The electrode members are formed to cover the entire surfaces of the cathode electrode and the anode electrode, respectively, and the entire surface of the cathode electrode post and the anode electrode post, respectively. The electrode members and the electrode posts are positioned with respect to each other by positioning guides, respectively.

A semiconductor substrate etching apparatus is disclosed. In this apparatus, a semiconductor substrate is mounted on the upper surface of a first vacuum chuck, an etching solution is supplied to a groove of a roller of a semiconductor substrate end surface etching mechanism, which covers the end surface of the semiconductor substrate, and the first vacuum chuck and the roller are rotated in the opposite directions. The end surface of the semiconductor substrate is brought into contact with the etching solution. The etching solution is then transferred onto the end surface of the substrate, thus performing etching of the end surface.

Etching apparatus

In a power semiconductor device according to the present invention, a sheet, formed of a soft metal such as Ag, is provided on that portion of a pressing control electrode which is brought into contact with an Al gate electrode of a pellet. By means of this sheet, it is possible both to apply a strong pressing power to the Al gate electrode and to reduce the contact resistance between the two electrode. Since an excessive amount of heat is not produced on account of the contact resistance, the semiconductor device can be protected against being damaged.

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Yokohama, Japan

Takashi Fujiwara