Other

Hitachi, Ltd.

Takao Sonobe

Toshinori Hirashima

Kenji Hanada

Kazuo Watanabe

Takefumi Endo

The junction strength between the external terminals and the wiring substrate of a semiconductor device is improved without creating a large size semiconductor device. In the outer periphery of the back surface of an interposer substrate Bi on which a semiconductor chip constructing a CSP type semiconductor device is mounted, there are arranged a plurality of bump electrodes BB whose size in the direction intersecting the sides of the interposer substrate B is larger than that in the direction along the sides of the interposer substrate Bi.

Semiconductor device with wiring substrate

Disclosed herein is a semiconductor device in which a main surface of a semiconductor chip is placed over a first main surface of a wiring board so as to be opposed thereto and which includes a plurality of external terminals provided over a second main surface of the wiring board. The plurality of external terminals have a plurality of signal terminals and a plurality of power terminals. The signal terminals are arranged along the periphery of the wiring board and the power terminals are arranged along the inside of a row of the signal terminals. Chip capacitors are placed over the main surface of the semiconductor chip, which lies inside a row of the power terminals. The plurality of signal terminals and power terminals formed over the main surface of the semiconductor chip are connected to a plurality of wires formed over the wiring board respectively. The wiring board is provided with an opening or recess which extends therethrough. The chip capacitors are located within the opening or recess. Thus, a reduction in switching noise can be achieved.

Growing community of inventors

Komoro, Japan

Takao Sonobe