Clarion Co

Calpis Shokuhin Kogyo Kabushiki Kaisha

Takao Kurihara

Masahiro Hamatsu

Masaharu Mori

Yoshitaka Uchida

Koichi Sakamoto

Nagatoshi Uehara

Takeshi Terabayashi

Mutsuo Yasumatsu

Nobuhiro Kurihara

Shinichi Shoji

Kasutaka Ohmura

An information processing apparatus having a device which processes data at a rate exactly adjusted relative to the rate of a data supplying device without requiring a common clock signal. A writing unit writes data into a buffer memory. When a first half of the buffer memory has become filled with data, a starter makes a reading unit start reading data from the buffer memory. A writing time measurement unit and a reading time measurement unit respectively measure the writing time required to write data in the buffer memory and the reading time required to read data from the buffer memory starting from the first storage location to the exact middle storage location of the buffer memory. A controller controls the rate at which data is read from the buffer memory based on the relationship between the writing time and the reading time.

Information processing method and apparatus, automotive information system and method of controlling the same, and storage medium on which an information processing program is stored

A sliding correlator for initial synchronization and tracking of a SS (Spread Spectrum)-modulated signal containing a transmitted pseudo noise (PN) code, digitizes the received signal, and attempts to correlate the PN code in the received signal with a locally generated reference PN code. Initial synchronization employs correlation with three reference PN codes, an early, center and late channel. When correlation is found between the transmitted PN code and one of the reference PN codes, the three reference PN codes are shifted to align the center channel with the correlated channel and to displace the early and late channel reference PN codes to one side and the other of the center channel. In one embodiment, the displacement is one-third chip, and in another embodiment, the displacement is one-half chip. In one embodiment for initial tracking, the three channels are displaced one chip from each other and, after failure to attain correlation in any of the channels, the three channels are displaced three chips to again seek synchronization. Initial Tracking, following initial synchronization, detects changes in correlation in the three channels, and adjust the frequency and/or the phase of the three reference PN codes to return the reference PN codes into a desired relationship with the transmitted PN code. In one embodiment of tracking, clockwise and counterclockwise cyclic permutation of the three reference PN codes is used to maintain alignment between the three reference PN codes and the transmitted PN code. In other embodiments, the condition of correlation, or lack thereof, in each channel is stored in a register and shifting of the reference PN codes is performed in response to the status of the register.

Sliding correlator

A device for making it possible to set reference data in a digital correlator with a high speed includes a digital correlator, a PN (pseudo-noise) code generator and a counter. The reference data outputted by the PN code generator are inputted to the digital correlator by reference register clocks. At the same time, these clocks are counted by the counter and when this count value arrives at a number of chips of the reference data, input of the reference data is terminated.

Digital correlating device

A spread spectrum receiving device is disclosed, in which data demodulation is effected in such a way that a received signal is divided into two parts, from which a COS PN code chip signal and a SIN PN code chip signal are obtained; that these chip signals are A/D-converted by means of A/D converters and then given to digital correlators; and that correlation outputs thus obtained are combined to synthesize a final correlation output. Further there are disposed a plurality of steering gates on the input side of the A/D converters. The a/D conversion can be effected in the neighborhood of a point, where the level of PN code chip waveforms is stable, owing to the fact that the steering gates are controlled by control signals obtained by processing the correlation outputs or output of the A/D conversion. In this way it is made unnecessary to raise the sampling frequency for the A/D conversion and to increase the number of stages of shift registers in the digital correlators.

Spread spectrum receiving device

A GOLD code generating device in an SSC device is disclosed, which is so constructed that, in the case where two kinds of GOLD codes are used in the SSC device by the CSK system, etc., in order to generate a GOLD code by means of two m sequence codes, a first GOLD code is generated by using an m sequence code generated by one of the m sequence code generators and another m sequence code generated by the other m sequence code generator, while a second GOLD code is generated by using an m sequence code obtained by delaying the m sequence code generated by the other m sequence code generator by a predetermined number of chips.

GOLD code generating device in a spread spectrum communication device

A pseudo noise code generator is disclosed, in which the shift register value of the pseudo noise code generator corresponding to the generation timing of a bit pulse or a sampling pulse is latched and the output of the latch is compared with the shift register value of the generator, the bit pulse or the sampling pulse being obtained, when they are in accordance with each other.

Head or arbitrary bit pulse generating circuit and sampling pulse

A bias control device for a narrow band interference suppressing filter using a surface acoustic wave (SAW) element is disclosed, in which bias shift signals corresponding to spectre intensities of channels having central frequencies different from each other outputted from the filter are caught as digital data; magnitudes of the data are compared and at the same time the channel numbers are sorted in the order of the spectre intensities; and control signals for the filter are generated in this way.

Bias control device

A code generation control device is disclosed, which is provided with circuits indicated in following items (a) to (d) in order to set initial information for generating codes in a plurality of PNGs:

Code generation control device

An SSC device according to the SSC method using a correlator is disclosed, in which a plurality of stages of shift register is connected in series, the outputs of the stages of the shift register being given selectively to the correlator and the initial value of the shift register in the pseudo noise code generator on the receiving side are set in a mirror image relation with respect to the initial value of the transmitted signals of the pseudo noise code generator at the code synchronization.

Spread spectrum communication device

An SSC receiver, in which desired information is restored by means of a correlator, which forms the correlation between a received PN code included in a received signal and a reference PN code included in a reference signal, is disclosed, wherein it is so constructed that the output of the correlator stated above is inputted in pattern judging means, that in the case where no accordance with a predetermined judgment pattern is obtained, when a certain period of time has elapsed, judgment patterns, which are analogous to the predetermined judgment pattern stated above, are switched over one after another, every time a predetermined period of time has elapsed, and that the position, where the two codes are in accordance with each other, is set correctly by controlling the phase of the reference PN code by using the output, when the output of the correlator described above is in accordance with either one of the judgment patterns.

Spread spectrum communication receiver

A spread spectrum communication receiver is disclosed, which is provided with a correlator for correlating a received PN code contained in a received signal with a reference PN code contained in a reference signal generated on the receiver side, the output of which is given to pattern judgment means such as a matched filter, etc., and an operation of the initial synchronization of the two PN codes in the correlator is effected by using a judgment output obtained when the pattern of the output of the correlator is in accordance with a predetermined judgment pattern.

A maximum length shift register sequence generator comprises: (1) an input terminal for feedback (FB 0); (2) an input terminal to the steering gate of the first stage (FB 1); (3) an output terminal from the exclusive OR gate of the last stage (CAS); (4) a three state output terminal from a multiplexer circuit (FB 2); and (5) a control input terminal of a three state output multiplexer circuit (FBCNT); a plurality of which can be connected in cascade. It includes a flipflop circuit, whose data input is a feedback control signal (FBCNT) controlling within which maximum length shift register sequence generator the output of the multiplexer circuit should be fedback, when they are connected in cascade, and whose clock input is the strobe pulse (STB), the output of this flipflop circuit being the enable input of the three state output multiplexer circuit. It includes further a logical product gate (AND 0), whose inputs are two signals, one being a latch enable pulse ( LE ) for latching, (i) the initial state of the flipflop, (ii) the feedback state, (iii) the last stage selection state for the flipflops, the other being a chip select (CS), and a demultiplexer circuit distributing the output of this logical product gate (AND 0) to the latch circuits for latching the data (i).about.(iii) described above, depending on the two select signals (SEL 0.about.1).

Maximum length shift register sequence generator

In a spread spectrum communication system, in which correlation output is obtained by giving a correlator a sender side output code and a receiver side output code, communication channels obtained by dividing the whole channel by using GOLD codes as the sender and receiver side output codes are used and the GOLD codes are constructed by adding preferred pairs of the two m sequences modulo 2.

Spread spectrum communication system

A control circuit such as a microcomputer sets only the starting address of the memory in which initial information for generating a maximum length recurring sequence is stored and the number of chips of the maximum length recurring sequence and the initial information for generating a maximum length recurring sequence is set from the memory in the maximum length recurring sequence generator by a hardware. The hardware for accessing the memory is constructed by a counter working with a high speed clock. The number of chips of the maximum length recurring sequence set by the external control circuit is counted by a counter working with a high speed clock.

Maximum length linearly recurring sequence generator control device

A maximum length shift register sequence generator capable of changing the format and phase of an M code known as maximum length shift register sequences in the transmitter and receiver. The register is most suitable for use in spread spectrum communication systems adapted to effect transmission by correlation between an M code from the transmitter and such an M code generated in the receiver. The generator includes a latch for storing the format and initial phase of an M code to be generated subsequently, and a microprocessor for setting in the latch necessary data required for changing the M code. A change of the M code is effected by a strobe signal lasting for a time equal to the lasting time of one clock pulse.

Growing community of inventors

Tokyo, Japan

Takao Kurihara