Hitachi, Ltd.

Takao Kumihashi

Shinichi Tachi

Kazunori Tsujimoto

Shuntaro Machida

Fumio Murai

Takashi Yunogami

Takeshi Furusawa

Kazuyuki Suko

Shunji Sasabe

Jun Abe

Junichi Kobayashi

Tatehito Usui

Masafumi Kanetomo

Nobuyuki Mise

A method and apparatus for dry etching changes at least one of the effective pumping speed of a vacuum chamber and the gas flow rate to alter the processing of an etching pattern side wall of a sample between first and second conditions. The first and second conditions include the presence or absence of a deposit film, or the presence, absence or shape of a taper angle. Various parameters for controlling the first and second conditions are contemplated.

Method and apparatus for dry etching

To provide a method for manufacturing a semiconductor device, by which it is possible to form a trench or a hole with high aspect ratio on a methylsiloxane type film with low dielectric constant with causing neither via-connection failure nor short-circuit failure even when lower level interconnect is covered with etching stopper. The method comprises the processes of forming a layered film with a silicon oxide film on upper layer of a methylsiloxane type film and forming the layered film using a hard mask. When the etching stopper is etched, the silicon oxide film acts as a hard mask for the methylsiloxane type film, and transfer of faceting to the methylsiloxane type film is prevented. Thus, parasitic capacitance of multi-level interconnect can be reduced without causing via-connection failure and short failure.

Semiconductor device and manufacturing method thereof

In order that reaction products of low vapor pressure may be prevented from being deposited on the side wall of a predetermined pattern when this pattern is to be formed by dry-etching a Pt film or a PZT film, a resist mask having a rounded outer periphery at its head is used when the Pt film deposited on a semiconductor substrate is to be dry-etched. After this dry-etching, moreover, an overetching of a proper extent is performed to completely remove the side wall deposited film which is left on the side of the pattern. The resist mask is formed by exposing and developing a benzophenone novolak resist and subsequently by heating to set it while irradiating it, if necessary, with ultraviolet rays.

Process for manufacturing semiconductor integrated circuit device

In order that reaction products of low vapor pressure may be prevented from being deposited on the side wall of a predetermined pattern when this pattern is to be formed by dry-etching a Pt film or a PZT film, a resist mask 54 having a rounded outer periphery at its head is used when the Pt film 53 deposited on a semiconductor substrate 50 is to be dry-etched. After this dry-etching, moreover, an overetching of a proper extent is performed to completely remove the side wall deposited film 55 which is left on the side of the pattern. The resist mask 54 is formed by exposing and developing a benzophenone novolak resist and subsequently by heating to set it while irradiating it, if necessary, with ultraviolet rays.

Method for dry etching

In microwave dry etching, the substrate/resist etching selectivity is controlled by adding a material, such as an additional gas, to the reaction gas plasma that heats the substrate with greater energy transfer efficiency than the resist. For example, a W substrate having a resist is etched with an SF.sub.6 reaction gas to which is added an Xe gas for generating incident ions that impinge the substrate with greater energy transfer than they do the resist. This produces a greater hot spot temperature for the substrate as compared with the resist to increase the substrate/resist etching selectivity. The hot spot temperature difference can be further effected by applying a bias potential to the substrate during the etching with an RF power supply.

Dry-etching method and apparatus

At an effective exhaust speed of 1200 liter/s, high frequency power with power surface density of 4.5 W/cm.sup.2 is made to discharge high density plasma, thereby carrying out dry etching. With a gas residence time of 100 ms or less, a gas flow rate controller is provided which has a response time substantially equal to the gas residence time. Etching can be performed at high speed with deposit reaction restrained and high ion current density. Because of the enhanced ion current density, etching providing high selectivity can be made with lowered ion energy. The time required for gas exchange in time modulation etching, multi-step etching and attachment/removal of electrostatic adsorption can be shortened to improve the etching throughput.

Dry etching apparatus and method

A method and apparatus for dry etching changes at least one of the effective pumping speed of a vacuum chamber and the gas flow rate to alter the processing of an etching pattern side wall of a sample between first and second conditions. The first and second conditions include the presence or absence of a deposit film, or the presence, absence or shape of a taper angle. Various parameter for controlling the first and second conditions are contemplated.

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Musashino, Japan

Takao Kumihashi