Sharp Kabushiki Kaisha Corporation

Takao Kinoshita

Masato Kobayashi

Haruhisa Takiguchi

Shigeo Onishi

Atsushi Ogawa

Jun Kudo

Masahiro Araki

Satoshi Morishita

Koichiro Fujita

Shinya Yoshida

Yushi Inoue

Yoshimi Tanimoto

Tomotoshi Satoh

Satoshi Saito

Tadashi Yasui

Masayuki Hoteida

Yujiro Ikeda

Tohru Murata

Kunihiko Orita

Takeshi Funaki

A semiconductor wafer is provided with a substrate, a GaN type semiconductor film which is laminated on the substrate, a plurality of element regions which are provided on the GaN type semiconductor film, a dielectric film which is laminated on the GaN type semiconductor film, and a dicing region which has a dicing groove which is provided in a lattice form without passing through the dielectric film described above so as to partition the element regions described above. Then, an end on the element region side of the dicing groove is higher or lower than a central portion of the dicing groove in a width direction in a bottom surface of the dicing groove.

Semiconductor wafer, semiconductor device diced from semiconductor wafer, and method for manufacturing semiconductor device

A nitride semiconductor device includes a substrate; a nitride semiconductor multilayer structure which is formed on the substrate, includes a first nitride semiconductor layer and a second nitride semiconductor layer having a different composition from that of the first nitride semiconductor layer, and generates two dimensional electron gas on a hetero interface between the first nitride semiconductor layer and the second nitride semiconductor layer; and an insulating film which covers at least a portion of a surface of the nitride semiconductor multilayer structure, has a concentration of Si&#x2014;H bonds equal to or less than 6.0&#xd7;10cm, and is formed of silicon nitride.

Nitride semiconductor device

A nitride semiconductor structure in which a first nitride semiconductor underlying layer is provided on a substrate having a recess portion and a projection portion provided between the recess portions at a surface thereof, the first nitride semiconductor underlying layer has at least 6 first oblique facet planes surrounding the projection portion on an outer side of the projection portion, and a second nitride semiconductor underlying layer buries the first oblique facet planes, a nitride semiconductor light emitting element, a nitride semiconductor transistor element, a method of manufacturing a nitride semiconductor structure, and a method of manufacturing a nitride semiconductor element are provided.

Nitride semiconductor structure, nitride semiconductor light emitting element, nitride semiconductor transistor element, method of manufacturing nitride semiconductor structure, and method of manufacturing nitride semiconductor element

A method of manufacturing a semiconductor device comprising a wiring formation step including: forming an interlayer insulating film composed of a boron nitride film having a dielectric constant of less than 4 on an (n)-th layer wiring, forming a hole and/or a trench in the interlayer insulating film, burying the hole and/or trench with a conductive material and forming an (n&plus;1)-th layer wiring on the hole and/or trench.

Method of manufacturing a dual damascene structure using boron nitride as trench etching stop film

A method of fabricating a semiconductor device first involves forming a conductive layer made of copper or its alloy as a principal component on a semiconductor substrate. Then, forming an insulating layer on the conductive layer. Next, forming an opening in the insulating layer with use of a resist pattern as a mask so as to reach the conductive layer; subjecting the resulting semiconductor substrate to an oxidizing/ashing treatment in an oxygen plasma atmosphere to remove the resist pattern and to oxidize at least an inner surface of the opening and finally, washing at least the inner surface of the opening with a solution containing citric acid as a principal component at normal temperature.

Method of fabricating semiconductor device

A process for manufacturing a semiconductor device having a buried electrically conductive film includes: a first step of, with heating at a first temperature a substrate on which an insulating film having a depression is formed, depositing a first copper film having a sufficient thickness for moderating a step defined by the depression, on a surface of the insulating film by a metal organic chemical vapor deposition method; and a second step of, with heating the substrate at a second temperature higher than the first temperature, depositing a second copper film having a sufficient thickness for filling the depression by a metal organic chemical vapor deposition method, wherein a buried electrically conductive layer composed of the first and second copper films is formed in the depression by the first and second steps.

Process for manufacturing a semiconductor device

A process for fabricating a nonvolatile semiconductor memory device has one transistor and one ferroelectric capacitor electrically connected to each other by a contact plug, which comprising forming a transistor; forming an inter-layer insulating film, at least an upper surface portion thereof being a titanium oxide film; forming a capacitor lower electrode; and forming a capacitor insulating film and a capacitor upper electrode, wherein the lower electrode forming step comprises: depositing a titanium nitride film and a platinum film on the titanium oxide film; etching the platinum film with a first etching gas adapted to suppress deposition of substances including platinum; and etching the titanium nitride film with a second etching gas having a high etching selectivity to the titanium oxide film.

Process for fabricating nonvolatile semiconductor memory device having a

A method of forming a contact is disclosed. The method of the present invention includes the steps of: forming an insulating layer on a silicon compound; forming a contact hole in the insulating layer, the contact hole reaching the silicon compound; forming at least one layer of a refractory material film on an inner wall of the contact hole and on a surface of the insulating layer; forming a silicon containing tungsten layer on the refractory material film by CVD; and growing tungsten on the silicon containing tungsten layer by CVD, to fill the contact hole with the tungsten wherein the silicon containing tungsten layer contains silicon in the range of 0.6 wt. % to 20 wt. %.

Method of forming a contact

A method for forming a contact plug comprising steps of depositing on a semiconductor substrate provided with a base device an interlayer insulator consisting of lowermost, intermediate and uppermost layers in which the intermediate layer is less sensitive to an etchant which is capable of dissolving the lowermost layer; subjecting the resultant substrate to a thermal treatment to planarize the surface of the uppermost layer; forming a contact hole by dry-etching at an intended contact region of the interlayer insulator; subjecting the contact hole to wet-etching with an etchant which is capable of dissolving the lowermost layer of the interlayer insulator to form a stepped portion between the edges of the lowermost layer and the intermediate layer in the contact hole; and depositing a metal in the resulting contact hole to form a contact plug, thereby preventing the contact plug from peeling off the substrate.

Growing community of inventors

Osaka, Japan

Takao Kinoshita