Matsushita Electronics Corporation

Matsushita Electric Industrial Co., Ltd.

Matshshita Electronics Coropration

Takao Kakiuchi

Kazuo Sato

Hiroshi Yamamoto

Tsutomu Fujita

Kousaku Yano

Shinji Fujii

Shuichi Tanimura

Shoichi Tanimura

A long-life, electrically writable and erasable non-volatile semiconductor memory device is disclosed. The memory device is fabricated in the following steps. After forming a first gate insulating film on a semiconductor substrate, a window is opened in the first gate insulating film to expose a portion of the surface of the semiconductor substrate, using a two-step etching technique in which dry etching and wet etching are performed successively. The exposed portion of the semiconductor substrate not over-etched is selectively oxidized to form a tunnel insulating film (second gate insulating film) having edge portions resistant to dielectric breakdown. Thereafter, a floating gate, a third gate insulating film, and a control gate are formed sequentially. The floating gate is patterned in such a way as to cover the entire tunnel insulating film or cross only a portion of an edge of the tunnel insulating film. The stress caused to the tunnel insulating film as a result of the oxidation process for forming the third gate insulating film is relieved, providing the tunnel insulating film with resistance to dielectric strength.

Non-volatile semiconductor memory device and a method for fabricating

A method for patterning a metal layer without so-called 'rabbit ears' comprising the steps of: deposition of a metal layer on a substrate, deposition of a barrier layer on the metal layer, formation of a mask layer of a predetermined pattern on the barrier layer, etching of the barrier layer and the metal layer under conditions such that the mask layer is also eroded slightly, and removal of the mask layer. In other embodiments, selective etching of barrier layer and mask sidewalls avoids or eliminates such 'rabbit ears' and/or etchant product deposits which are precursors of such 'rabbit ears'.

Method for patterning a metal layer

A method for filling a contact hole in which (i) a silicon dioxide layer is formed on a silicon substrate; (ii) a contact hole is formed in the silicon dioxide layer; (iii) polysilicon film is formed on the side and bottom surface portions of the contact hole; (iv) gas containing tungsten reacts with the film; and (v) the contact hole is filled up with tungsten.

Method for filling contact hole

Disclosed is a method for fabricating an interconnection structure comprising a step of depositing an Al or Al alloy film on a dielectric film by a sputtering method improved in step coverage, a step of processing said Al or Al alloy film or a layered metal film thereof with another metal film into a metal line, and a step of depositing a film of high melting point metal or alloy thereof on the top and side surfaces of said line.

Growing community of inventors

Takarazuka, Japan

Takao Kakiuchi