Sharp Kabushiki Kaisha Corporation

Takao Abumi

Nobuo Minoura

Kazuhiro Nakai

Isao Matsumura

Yasukazu Yoshinaga

Haruhisa Takiguchi

Atsushi Ueno

Tomoyuki Aiura

Shuichi Yoshinaka

The reflection type screen comprises a reflection layer which is disposed on the opposite side to the projected light incident side of the screen, a horizontal view angle increasing layer which is disposed on the light incident side of the reflection layer, and a diffusion layer which is disposed on the light incident side of the horizontal view angle increasing layer. The horizontal view angle increasing layer has an array of convex ridges which are raised in a rear direction of the screen. Since the longitudinal direction of the ridges is aligned with the vertical direction of the screen, the view angle characteristics of the screen in a horizontal direction are improved and the diffusion characteristics of the screen in a vertical direction can be suppressed for preventing external disturbing light from an upper illumination light from being reflected toward the observers.

Reflection type screen

An intermediate gradation generator filters out a direct current component of a clock pulse and then superimposes the filtered clock pulse on average levels of a luminance signal.

Image signal processor generating reduced memory consumption still

An image signal processor includes a memory device for storing an image signal representative of a picture during one field period, an operating unit for generating a READ-OUT command necessary to read out contents stored in the memory device, a selector for selectively switching the memory device between a WRITE-IN READY condition and a READ-OUT READY condition, and a switching control unit for generating a control signal necessary to control the switching operation of the selector. The switching control unit is adapted to receive the READ-OUT command and a vertical synchronizing signal included in a composite video signal. The selector performs the switching operation in synchronism with the initial vertical synchronizing signal applied immediately after the READ-OUT command has been inputted.

Image signal processor

A video signal superimposing device for superimposing and clearly displaying video signals produced from at least two discrete systems includes an input terminal for inputting a color complex video signal, a separation circuit for separating a first brightness signal and a first chroma signal from the color complex video signal, a first generator for generating a second brightness signal, a first mixer circuit for mixing the second brightness signal and the first brightness signal separated by the separation circuit, a second generator for generating a second chroma signal, a second mixer circuit for mixing the second chroma signal and the first chroma signal separated by the separation circuit, and a third mixer circuit for mixing the mixed brightness signal applied from the first mixer circuit and the mixed chroma signal applied to the second mixer circuit.

Video signal superimposing device

An automatic tuning scheme for use in TV receivers includes a start/stop circuit which creates a search start signal and a search stop signal upon the receipt of a search start instruction and a detected incoming signal, respectively, a tuning voltage generator which generates a gradually varying tuning voltage under control of the search start signal and search stop signal, and a memory circuit for storing the tuning voltage from the generator when desired. The tuning voltage stored in the memory circuit is supplied to a tuner including a well known voltage-sensitive capacitance diode.

Automatic pre-programming system for TV receivers

A television signal determination circuit is associated with an automatic tuning system, which automatically tunes a television set to local channels, in order to determine whether received signals are desired television signals. The television signal determination circuit comprises a first counter means for counting received synchronizing signals for a predetermined period of time, a second counter means for counting reference clock signals for the predetermined period of time, and a determination means for determining whether the synchronizing signals are received by a predetermined number within the predetermined period of time by comparing output signals from the first and second counter means.

Growing community of inventors

Yaita, Japan

Takao Abumi