Renesas Technology Corp.

Renesas Electronics Corporation

Takanobu Ambo

Toshio Mochizuki

Hirokazu Shimizu

Eiki Imaizumi

Satoshi Jimbo

For a semiconductor integrated circuit device such as AFE including a CDS amplifier, in case of excessive signal input to the CDS amplifier, a technique capable of preventing the response characteristic of the CDS amplifier from deteriorating is provided. In the AFE including the CDS amplifier, the CDS amplifier is prevented from becoming saturated by detecting an excessive signal input and triggering the reset of the CDS amplifier. Thereby, no abnormality occurs in the transient response of the CDS amplifier. Specifically, comparison of input signals to the CDS amplifier is performed by a comparator and the CDS amplifier is reset by a reset circuit (by fixing the input terminals of the CDS amplifier to a constant voltage) in case of excessive signal input, so that the CDS amplifier will not amplify excessive signal inputs.

Semiconductor integrated circuit device

Disclosed herein is a semiconductor integrated circuit device such as a for-camera preprocessing LSI suitable for a semiconductor integrated circuit and having improved responsiveness. In a D/A converter circuit for generating a feedback signal for compensating for black level variation in a for-camera preprocessing LSI, first-conductivity-type MOSFETs as first current sources produce currents corresponding to digital signals. The digital signals are supplied to first-conductivity-type first differential MOSFETs and second-conductivity-type second differential MOSFETs, with the gates and drains of the first differential MOSFETs and the gates and drains of the second differential MOSFETs being connected together respectively. There is provided a differential amplifier circuit in which a bias voltage is supplied to a noninverting input terminal thereof and an inverting input terminal thereof is connected to an analog current output node which is the drains connected together of one sides of the first differential MOSFETs, and a resistive element is provided between the inverting input terminal and an output terminal thereof. A converted analog output voltage is generated at the output terminal, and a voltage equal to the bias voltage is supplied to drains of the other sides of the first differential MOSFETs.

There is a need for providing a variable amplifier circuit suited for a semiconductor integrated circuit and a high-performance camera preprocessing LSI using the variable amplifier circuit. At first timing, a first input capacitor acquires a first signal. An amplifier circuit amplifies a second signal acquired to the second input capacitor according to a gain corresponding to a capacity ratio between the second input capacitor and a feedback capacitor composed of a variable capacitor device. At second timing, the second input capacitor acquires a second signal. The amplifier circuit amplifies the first signal according to a gain corresponding to a capacity ratio between the first input capacitor and the feedback capacitor. A variable gain amplifier circuit interleavingly amplifies the first signal and the second signal in synchronization with the first timing and the second timing.

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Tokyo, Japan

Takanobu Ambo