Kabushiki Kaisha Toshiba

Takanao Amatsubo

Atsushi Kunimatsu

Yukio Watanabe

Kiyoji Ueno

Hideki Yasukawa

Takayuki Kamei

Atsushi Masuda

Masatoshi Sekine

Yoshinori Shigeta

Hiroaki Nishi

Joji Fujiyama

Yasumasa Kikunaga

Kenji Mihira

The present invention provides an image processing unit, an image processing system, and an image processing method capable of achieving a higher speed and a higher efficiency in a rendering and implementing a low cost of the system. The image processing unit according to the present invention comprises a main storing portion for storing information of three-dimensional objects, a plurality of calculating portions for processing images based on three-dimensional object information which are read from the main storing portion, and a hierarchical storing portion having a plurality of hierarchies and connected between the main storing portion and the plurality of calculating portions to store a part of information at a lower level into a higher level sequentially, wherein image processing by the plurality of calculating portions are performed in parallel.

Image processing unit, image processing system using the same, and image processing method

In hyperframe synchronization processing of a hyperframe including FEXT frames and NEXT frames, each difference between the number of consecutive FEXT frames and the number of consecutive NEXT frames is calculated, and a unique sequence of these differences is detected. When the unique sequence of differences can be detected from a received hyperframe, the position of a frame which is being received now in the hyperframe can be specified at that point in time. Hence, hyperframe synchronization can be established in a short time after frame synchronization is established.

Hyperframe synchronization processing apparatus and hyperframe synchronization method

A model of architecture of a processor is called an architecture template. Because a designer selects an architecture template of a special purpose processor which is suitable for an objective signal processing algorithm from an architecture template library, a special purpose processor which is the most suitable for any signal algorithm can be synthesized. Moreover, by providing a method of creating an architecture template simply, even if there is no desirable architecture template, an objective architecture template can be synthesized for a short time.

Logical circuit automatical design method and system, and computer

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Kawasaki, Japan

Takanao Amatsubo