Sharp Kabushiki Kaisha Corporation

Takamitsu Kitayama

Tomozo Ohta

Masao Miyazaki

Atsushi Shirakawa

Tetsuo Ueno

Takahiro Chihara

A receiver device in accordance with the present invention (for example, wireless LAN device) includes: a radio frequency signal processor section converting an incoming radio frequency signal to a lower frequency; an RSSI circuit (reception strength sensor section) sensing the signal strength of the radio frequency signal; an intermediate frequency signal processor section converting a signal from the radio frequency signal processor section to an even lower frequency; a digital demodulator section (demodulator section) demodulating a signal from the intermediate frequency signal processor section; and a power control circuit controlling power supply to circuits in the intermediate frequency signal processor section which makes up part of the analog section (AGC circuit, IF mixer circuit, LPF circuit, and amplifier circuit) according to a result of sensing by the RSSI circuit. The structure provides a power saving receiver device.

Receiver device, communications device, wireless LAN device, power control method for a receiver device, power control program for a receiver device, and storage medium

An AFC circuit stabilizes the frequency of an intermediate frequency signal to be applied to a demodulation circuit. A frequency conversion circuit responds to a local oscillation signal generated from a voltage-controlled oscillation circuit to convert the frequency of a digital modulation signal and applies the converted frequency to the demodulation circuit. A carrier reproduction circuit in the demodulation circuit reproduces the carrier of the intermediate frequency signal to output a synchronizing detection signal. The frequency of the reproduced carrier is frequency-divided by a frequency dividing circuit. A frequency division output thereof is counted by a counter for a definite period. Data is outputted from a microprocessor in response to a count output of the counter and the synchronizing detection signal, and the data is then converted into an AFC voltage by a D/A converter. The converted voltage is supplied as a control voltage to the voltage-controlled oscillation circuit. A stable intermediate frequency signal can be obtained by frequency-dividing the frequency of the carrier and counting the frequency division output thereof.

Growing community of inventors

Tenri, Japan

Takamitsu Kitayama