Renesas Electronics Corporation

Renesas Technology Corp.

Takako Funakoshi

Kazumasa Yanagisawa

Hideo Aoki

Eiichi Murakami

Takayuki Oshima

Hizuru Yamaguchi

Kazuyuki Tsunokuni

Kan Takeuchi

Kousuke Okuyama

In a semiconductor integrated circuit device having plural layers of buried wirings, it is intended to prevent the occurrence of a discontinuity caused by stress migration at an interface between a plug connected at a bottom thereof to a buried wiring and the buried wiring. For example, in the case where the width of a first Cu wiring is not smaller than about 0.9 &#x3bc;m and is smaller than about 1.44 &#x3bc;m, and the width of a second Cu wiring and the diameter of a plug are about 0.18 &#x3bc;m, there are arranged two or more plugs which connect the first wirings and the second Cu wirings electrically with each other.

Method of manufacturing a semiconductor integrated circuit device

A manufacturing technique is disclosed for producing a semiconductor integrated circuit device having plural layers of buried wirings, and such that there is prevented the occurrence of a discontinuity caused by stress migration at an interface between a plug connected at a bottom thereof to a buried wiring and the buried wiring. For example, in the case where the width of a first Cu wiring is not smaller than about 0.9 &#x3bc;m and is smaller than about 1.44 &#x3bc;m, and the width of a second Cu wiring and the diameter of a plug are about 0.18 &#x3bc;m, there are arranged two or more plugs which connect the first wirings and the second Cu wirings electrically with each other.

Semiconductor integrated circuit device

Growing community of inventors

Tokyo, Japan

Takako Funakoshi