Kabushiki Kaisha Toshiba

Takaki Kumanomido

Masaki Momodomi

Mitsugi Ogura

Kazutaka Ishigo

Hiroyuki Morinaga

A method of inspecting a mark arrangement according to an embodiment of the present invention includes: generating mask data in which mark seed data that includes an inspection mark that includes vector information and is not drawn on a mask and mark data is arranged on a scribe line of the mask, calculating coordinates of the inspection mark from a reference position of the mark seed data, detecting an arrangement state of the inspection mark with respect to the reference position by using the coordinates and vector information, and judging whether the mark seed data is correctly arranged by comparing the arrangement state of the inspection mark with an arrangement check rule.

Mark arrangement inspecting method, mask data, and manufacturing method of semiconductor device

The semiconductor integrated circuit comprises a semiconductor substrate having a circuit region, a pad formed at the surface of the semiconductor substrate and forming a PN junction with the semiconductor substrate, and first and second electrodes. Each electrode contacts the semiconductor region such that the contacting regions of the electrodes face each other with a ring shaped region between.

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Kanagawa, Japan

Takaki Kumanomido