Fuji Electric Co., Ltd.

National Institute of Advanced Industrial Science and Technology

Kabushiki Kaisha Toshiba

Takahito Kojima

Shinsuke Harada

Naoyuki Ohse

Yusuke Kobayashi

Tatsuo Shimizu

Takashi Shinohe

Yasunori Tanaka

Yasuhiko Oonishi

Yuichi Hashizume

Junji Senzaki

Keiko Ariyoshi

Takafumi Uchida

A method of manufacturing a silicon carbide semiconductor device, including forming a first-conductivity-type region in a SiC semiconductor substrate, selectively forming a plurality of second-conductivity-type regions in the first-conductivity-type region, forming an interlayer insulating film covering the first-conductivity-type region and the second-conductivity-type regions, selectively removing the interlayer insulating film to form a plurality of openings exposing the second-conductivity-type regions, forming, in each opening, a layered metal film having a cap film stacked on an aluminum film, thermally diffusing aluminum atoms in the aluminum film to thereby form a plurality of second-conductivity-type high-concentration regions, removing the layered metal film, selectively removing the interlayer insulating film to form a contact hole, forming a first electrode by sequentially stacking a titanium film and a metal film containing aluminum on the first surface of the semiconductor substrate in the contact hole, and forming a second electrode on the second main surface of the semiconductor substrate.

Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device

A vertical MOSFET having a trench gate structure includes an n-type drift layer and a p-type base layer formed by epitaxial growth. In n-type drift layer, an n-type region, a lower second p-type region and a first p-type region are provided. A part of the lower second p-type region extends in a direction opposite that of a depth of the trench and is connected to the p-type base layer.

Semiconductor device

In a method of manufacturing a silicon carbide semiconductor device that is a silicon carbide diode having a JBS structure including a mixture of a Schottky junction and a pn junction and that maintains low forward voltage through a SBD structure and enhances surge current capability, nickel silicide films are formed in an oxide film by self-alignment by causing a semiconductor substrate and a metal material film to react with one another through two sessions of heat treatment including a low-temperature heat treatment and a high-temperature heat treatment, the metal material film including sequentially a first nickel film, an aluminum film, and a second nickel film, the first nickel film being in contact with an entire area of a connecting region of a FLR and p-type regions respectively exposed in openings of the oxide film.

Method of manufacturing silicon carbide semiconductor device

A semiconductor device having, in a plan view, a termination region surrounding an active region. The semiconductor device includes a semiconductor substrate containing silicon carbide, a first-conductivity-type region provided in the semiconductor substrate at its first main surface, a plurality of first second-conductivity-type regions selectively formed in the semiconductor substrate at its first main surface, a plurality of silicide films respectively in ohmic contact with the first second-conductivity-type regions, a first electrode that is in contact with the silicide films to form ohmic regions, with the first second-conductivity-type regions to form non-operating regions, and with the first-conductivity-type region to form Schottky regions, a second electrode provided at a second main surface of the semiconductor substrate, and a second second-conductivity-type region provided in the termination region. The ohmic regions, the non-operating regions and the Schottky regions are formed in the active region in a striped pattern. The second second-conductivity-type region connects the ohmic regions and the non-operating regions.

A semiconductor device including a silicon carbide semiconductor substrate having a first-conductivity-type region at its first main surface. The semiconductor device has, at the first main surface, a plurality of first second-conductivity-type regions and a second second-conductivity-type region selectively provided in the first-conductivity-type region, respectively in an active region and a connecting region of the semiconductor device, and an oxide film provided in a termination region of the semiconductor device and having an inner end that faces the active region. A first silicide film is in ohmic contact with the first second-conductivity-type regions. A second silicide film is in contact with the inner end of the oxide film and in ohmic contact with the second second-conductivity-type region. The semiconductor device has a first electrode including a titanium film and a metal electrode film stacked sequentially on the first main surface, and a second electrode provided at a second main surface.

A vertical MOSFET having a trench gate structure includes an n-type drift layer and a p-type base layer formed by epitaxial growth. In n-type drift layer, an n-type region, a lower second p-type region and a first p-type region are provided. A part of the lower second p-type region extending in a direction opposite that of a depth of the trench and connected to the p-type base layer.

A vertical MOSFET having a trench gate structure includes an n-type drift layer and a p-type base layer formed by epitaxial growth. In the n-type drift layer, an n-type region, an upper second p-type region, a lower second p-type region and a first p-type region are provided. The lower second p-type region is provided orthogonal to a trench, and a total mathematical area regions that are between the first p-type region and the p-type base layer and that include the n-type region is at least two times a total mathematical area of regions that are between the first p-type region and the p-type base layer and that include the upper second p-type region.

Silicon carbide semiconductor device and method of manufacturing a silicon carbide semiconductor device

On a surface of an n-type silicon carbide epitaxial layer on an n-type silicon carbide substrate, first and second p-type base regions are formed in the n-type silicon carbide epitaxial layer, an n-type region is formed in the n-type silicon carbide epitaxial layer, a p-type base layer is formed on the n-type region, an n-type source region and a p-type contact region are formed in the p-type base layer, and a trench is formed to a position shallower than the second p-type base region and penetrates the p-type base layer. A first sidewall angle of the trench at a position of the p-type base layer is 80&#xb0; to 90&#xb0; with respect to a main surface. A difference of the first sidewall angle and a second sidewall angle of the trench at a position deeper than a boundary of the p-type base layer and the n-type region is 1&#xb0; to 25&#xb0;.

On a front surface of a semiconductor base, an n-type drift layer, a p-type base layer, an n-type source region, and a gate trench and a contact trench penetrating the n-type source region and the p-type base layer and reaching the n-type drift layer are provided. The contact trench is provided separated from the gate trench. A Schottky metal is embedded in the contact trench and forms a Schottky contact with the n-type drift layer at a side wall of the contact trench. An ohmic metal is provided at a bottom of the contact trench and forms an ohmic contact with the n-type drift layer.

Semiconductor device and method of manufacturing semiconductor device

A vertical MOSFET of a trench gate structure includes an n-type drift layer and a p-type base layer formed by epitaxial growth. The vertical MOSFET includes a trench that penetrates the n-type drift layer and the p-type base layer. A low-concentration thin film is provided in the trench. The low-concentration thin film is in contact with the p-type base layer and is of the same conductivity type as the p-type base layer. Further, the low-concentration thin film has an impurity concentration that is lower than that of the p-type base layer.

Silicon carbide semiconductor device and method of manufacturing the silicon carbide semiconductor device

Each first p-type region is provided between adjacent trenches embedded with a MOS gate and is in contact with a p-type base region. Second p-type regions face a bottom and bottom corner portions of the trenches in a depth direction. An n-type CS region is a current spread layer provided between the first p-type regions and the second p-type regions. The n-type CS region is provided only in an active region and an end thereof is positioned at a boundary of the active region and an edge termination region. Further, the n-type CS region extends to be flush with or farther inward than an outermost first p-type region. An outermost p-type contact region extends from a drop between the active region and the edge termination region to the edge termination region and extends beyond the n-type CS region.

According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a first electrode, a second electrode, a control electrode and an insulating film. The first semiconductor region is of a first conductivity type and includes SiC. The second semiconductor region is provided on the first semiconductor region and has a first surface. The second semiconductor region is of a second conductivity type and includes SiC. The third semiconductor region is provided on the second semiconductor region, is of the first conductivity type and includes SiC. The first and second electrodes are electrically connected to the third semiconductor region. The control electrode is provided on the second semiconductor region. The insulating film is provided between the second semiconductor region and the control electrode. The insulating film contacts the first surface and the control electrode and includes nitrogen.

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Matsumoto, Japan

Takahito Kojima