Sony Corporation

Sony Semiconductor Solutions Corporation

Takahisa Ueno

Ryoji Suzuki

Kazuya Yonemoto

Koichi Shiono

Keiji Mabuchi

Takashi Abe

Tsutomu Haruta

Hideshi Abe

Testuya Iizuka

Hirofumi Sumi

Yasushi Maruyama

Tetsuya Iizuka

Yasuaki Hisamatsu

Junji Yamane

Yuichiro Araki

Nozomu Takatori

Mitsuharu Ohki

Katsuhiko Hanzawa

Kensei Jo

Masahiro Watanabe

Kumiko Mahara

Junichi Inutsuka

Kenichi Tayu

Keitarou Amagawa

Soraya Shirini

Junichi Iutsuka

Tomohiro Matsukawa

A pixel is appropriately interpolated regarding a histogram image in which a distance histogram is allocated to each pixel position. A signal processing apparatus according to the present technology includes a histogram generation unit that inputs a histogram image in which a distance histogram indicating results of a plurality of times of distance measurement as frequency information for each distance is allocated to each pixel position and generates a distance histogram of an interpolation target position in the histogram image on the basis of distance histograms of a plurality of pixel positions near the interpolation target position.

Signal processing apparatus and signal processing method

There is provided a solid-state image sensor including: a selection signal terminal configured to receive a selection signal designated by a pixel address in a two-dimensionally arranged pixel array; a photoelectric conversion section configured to generate a charge in accordance with incident light and store the charge in accordance with the selection signal; and a charge retention section configured to retain the charge stored in the photoelectric conversion section at a prescribed timing.

Solid-state imaging sensor and solid-state imaging device

Since the great number of elements constituting a unit pixel having an amplification function would hinder reduction of pixel size, unit pixel n,m arranged in a matrix form is comprised of a photodiode, a transfer switch for transferring charges stored in the photodiode, a floating diffusion for storing charges transferred by the transfer switch, a reset switch for resetting the floating diffusion, and an amplifying transistor for outputting a signal in accordance with the potential of the floating diffusion to a vertical signal line, and by affording vertical selection pulse &#x3c6;Vn to the drain of the reset switch to control a reset potential thereof, pixels are selected in units of rows.

Solid-state imaging element having image signal overflow path

A solid-state imaging device having an arrangement in which well contact is achieved for each pixel is provided. In the solid-state imaging device, a well contact part is formed in an activation region of a photoelectric conversion portion. The well contact part fixes a well in which the photoelectric conversion portion and transistors of the pixel are provided at a predetermined potential.

Solid state imaging device

A solid-state imaging including a comparing circuit, an inverting circuit, and a masking circuit, and that performs column parallel AD conversion processing of analog pixel signals output from a plurality of pixels arranged in a two-dimensional matrix form. The comparing circuit outputs a difference signal obtained by comparing each of the pixel signals outputted from the pixels with a reference signal having a ramp waveform. The inverting circuit inverts a logic of the difference signal outputted from the comparing circuit. The masking circuit masks an output of an output signal of the inverting circuit to a circuit in a subsequent stage during an input offset canceling period in which the comparing circuit cancels an input offset between the pixel signal and the reference signal.

Solid-state imaging device, driving control method thereof, and imaging apparatus

Solid-state imaging element, method for driving the same, and camera system

A solid-state imaging includes a comparing circuit, an inverting circuit, and a masking circuit, and performs column parallel AD conversion processing of analog pixel signals outputted from a plurality of pixels arranged in a two-dimensional matrix form. The comparing circuit outputs a difference signal obtained by comparing each of the pixel signals outputted from the pixels with a reference signal having a ramp waveform. The inverting circuit inverts a logic of the difference signal outputted from the comparing circuit. The masking circuit masks an output of an output signal of the inverting circuit to a circuit in a subsequent stage during an input offset canceling period in which the comparing circuit is canceling an input offset between the pixel signal and the reference signal.

Solid state imaging element having horizontal scanning circuit for providing reset signals

Solid-state image-pickup device including unit pixels having a 3-transistor design and wherein a vertical selection pulse provides a reset potential

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Kanagawa, Japan

Takahisa Ueno