Hitachi, Ltd.

Hitachi Kiden Kogyo, Ltd.

Takahisa Nitta

Hiroyuki Kondo

Takashi Ishikawa

Nobuo Owada

Katsumi Ogiue

Sankichi Takahashi

Masanori Odaka

Osamu Kasahara

Yukio Hishinuma

Harumi Matsuzaki

Katsuya Ebara

Tohru Kobayashi

Hiroaki Yoda

Hiroyuki Akimori

Mikinori Kawaji

Kazumichi Mitsusada

Masato Iwabuchi

Naoyuki Takahashi

Hideaki Kurokawa

Seiji Watanabe

Shunji Sasabe

Katumi Ogiue

Isao Kouchi

Takaaki Mori

Yoshiro Moriguchi

Ichiro Fukuwatari

Yoshio Saito

Vapor is separated from mist accompanying the vapor by passing the vapor through a porous membrane. The vapor having passed through the membrane is brought into contact with an object to be washed and condenses thereon, whereby the object is washed.

Vapor washing process and apparatus

Disclosed is a semiconductor integrated circuit device adopting a gate array scheme, having a plurality of layers of wiring formed by a Design Automation system. The device according to the present invention includes a semiconductor substrate having basic cell forming regions, the basic cell forming regions being spaced from each other with wiring channel regions between adjacent basic cell forming regions. The wiring includes at least first-layer wiring lines arranged overlying the wiring channel regions; second-layer wiring lines overlying both the basic cell forming regions and the wiring channel regions; and third-layer wiring lines overlying both the basic cell forming regions and the wiring channel regions. The first-, second- and third-layer wiring lines respectively extend in first, second and third directions, the second direction being different from the first direction. The wiring pitches of the second-layer wiring lines and the third-layer wiring lines are set substantially equal to or smaller than the wiring pitch of th first-layer wiring lines. As a further aspect of the present invention, the ratio of wiring pitch of third-layer wiring lines to first-layer wiring lines can be 0.5, 1.0, 1.5 or 2.0. In addition, insulator films on which are formed the wiring lines are respectively subjected to flattening processes in order to flatten their upper surfaces, prior to providing the wiring lines thereon.

Semiconductor integrated circuit device and method of manufacturing the

A conveyor means for transporting precision parts is divided into a plurality of block units and compressed air is supplied selectively to each block unit where a transporting pallet is present so as to reduce consumption of compressed air to the minimum. Also, it ensures high carrying efficiency because of its slow starting and slow stopping without reducing the speed during running.

Conveyor means

The invention relates to a method of making a semiconductor integrated circuit device, and aims at diminishing the size of the isolating region which isolates the adjacent semiconductor elements from each other. The method of the invention has the steps of forming on a substrate a deposition layer of diffused impurities of different conductivity type from that of the substrate, forming a masking film having apertures on the deposition layer, effecting an etching through making use of the masking film as the diffusion mask, so as to etch the portions of the deposition layer and the substrate under the apertures, thereby to form grooves which divide the deposition layer into island-like deposition layer sections, and stretching and diffusing the impurities in each island-like deposition layer section to form a diffusion layer which constitutes a part of a semiconductor element.

Method of making semiconductor integrated circuit device

In the production of a semiconductor integrated circuit device including a selective oxidation step at a high temperature using a nitride film as a mask for isolating respective element regions in a semiconductor wafer with oxidized regions, electrode contact regions and active regions are successively formed in each element region to be surrounded by the oxidized regions and thin oxide films are formed on exposed surfaces of the electrode contact regions, the thin semiconductor oxide films are removed simultaneously by immersed etching, and then electrode metal layers are formed thereon. The thickness of the oxide layer on which the electrode metal layers are formed is maintained almost uniform to ensure the isolation effect. Since a buried region in each element region is required only to make partial contact with the contact region at the bottom portion, the integration density of the elements in the integrated circuit can be increased.

Method of manufacturing oxide isolated semiconductor device utilizing

A method of manufacturing a semiconductor device, comprises the steps of masking desired parts of a semiconductor substrate with a material which is impervious to an etchant for the substrate, exposing the substrate to the etchant to thereby etch substrate parts which lie directly beneath end parts of the etchant-impervious material and substrate parts which are not masked, applying a solution preferentially into the parts directly beneath the end parts of the etchant-impervious material among the etched substrate parts, the solution being capable of being converted into a semiconduct or oxide by a predetermined heat treatment, and heat-treating the substrate in order to oxidize the etched substrate surface parts.

Method of manufacturing a semiconductor device

Growing community of inventors

Fuchu, Japan

Takahisa Nitta