Victor Company of Japan, Limited

Takahisa Matsumoto

Yukinobu Ishigaki

A spread spectrum communication system comprising a transmitter including an angle modulator, a frequency divider, a spread code generator, and a spread spectrum modulator, and a receiver including a despreading circuit, an angle demodulator, a sync detection circuit, and a clock signal generating circuit. In the transmitter, the spread code generator produces a spread code having correlation with the angle-modulated signal outputted from the angle modulator. In the receiver the despreading circuit despreads the spread spectrum modulation signal sent from the transmitter by a demodulation spread code. The angle demodulator generates a demodulation output by means of a phase-locked loop circuit contained therein. The sync detection circuit detects sync condition on the basis of noise level of a phase detector provided in the phase-locked loop circuit, and generates a sync detection signal when sync condition is established. And, the clock signal generating circuit responds the sync detection signal to switch a demodulation clock from a temporary clock used for capturing a sync time to a regular clock which is equivalent to a modulation clock signal used in the transmitter.

Spread spectrum communication system

A demodulation system for spread spectrum communication includes a first low pass filter for processing an input spread spectrum signal including a product of an information signal and a first spread code. A second spread code is generated which is equivalent to the first spread code. A second low pass filter processes the second spread code and has a transfer function substantially equal to a transfer function of the first low pass filter. An absolute value circuit derives an absolute value of an output signal from the second low pass filter. A division circuit derives a reciprocal of an output signal from the absolute value circuit. A delay circuit delays the second spread code by a predetermined time. A first multiplier multiplies an output signal from the division circuit and an output signal from the delay circuit, and generates a third spread code in response to the output signals from the division circuit and the delay circuit. A second multiplier multiplies an output signal from the first low pass filter and the third spread code, despreading the output signal from the first low pass filter with the third spread code and recovering the information signal from the output signal of the first low pass filter.

Growing community of inventors

Yokohama, Japan

Takahisa Matsumoto