Kabushiki Kaisha Toshiba

Toshiba Electronic Devices & Storage Corporation

Juki Corporation

Takahiro Ogata

Tatsuo Shimizu

Takashi Sugiyama

Hiroshi Kono

Teruyuki Ohashi

Shinichi Sakamoto

Shunsuke Asaba

A semiconductor device according to an embodiment includes a transistor region and a diode region. The transistor region includes n-type first SiC region having a first portion contacting a first plane, p-type second SiC region, n-type third SiC region, and a gate electrode. The diode region includes the first SiC region having a second portion contacting the first plane and p-type fourth SiC region. The semiconductor device includes a first electrode contacting the first portion and the second portion and a second electrode contacting a second plane. An occupied area per unit area of the fourth SiC region is larger than an occupied area per unit area of the second SiC region. In addition, a first diode region is provided between a first transistor region and a second transistor region. An inorganic insulating layer is provided between the first electrode and a gate wiring adjacent to the first electrode.

Semiconductor device, inverter circuit, driving device, vehicle, and elevator

A semiconductor device according to an embodiment includes a transistor region and a diode region. The transistor region includes a first silicon carbide region of n-type having a first portion in contact with a first plane, a second silicon carbide region of p-type, a third silicon carbide region of n-type, and a gate electrode. The diode region includes the first silicon carbide region of n-type having a second portion in contact with the first plane and a fourth silicon carbide region of p-type. The semiconductor device includes a gate wiring electrically connected to the gate electrode. A distance between a high-concentration portion included in the fourth silicon carbide region and the gate wiring is larger than a distance between a high-concentration portion included in the second silicon carbide region and the gate wiring.

A semiconductor device according to an embodiment includes a semiconductor chip having a transistor region and a diode region, and a conductor. The semiconductor chip includes a first electrode, a second electrode, a silicon carbide layer between the first electrode and the second electrode, and a gate electrode. The first electrode includes a first region in the transistor region and a second region in the diode region. A first contact area between the conductor and the first region is larger than a second contact area between the conductor and the second region.

A semiconductor device of an embodiment includes a transistor region and a diode region. The transistor region includes an n-type first silicon carbide region having a first portion in contact with a first plane, a p-type second silicon carbide region, an n-type third silicon carbide region, a first electrode in contact with the first portion, the second silicon carbide region, and the third silicon carbide region, a second electrode in contact with a second plane, and a gate electrode. The diode region includes an n-type first silicon carbide region having a second portion in contact with the first plane, a p-type fourth silicon carbide region, a first electrode in contact with the second portion and the fourth silicon carbide region, and a second electrode. An occupied area per unit area of the fourth silicon carbide region is larger than an occupied area per unit area of the second silicon carbide region. The first diode region is provided between a first transistor region and a second transistor region.

Semiconductor device, inverter circuit, drive device, vehicle, and elevator

A semiconductor device of embodiments includes: an element region including a transistor and a first diode; a termination region surrounding the element region and including a second diode; and an intermediate region between the element region and the termination region. The element region includes a first electrode, a second electrode, a gate electrode, a silicon carbide layer, and a gate insulating layer. The termination region includes a first wiring layer electrically connected to the first electrode, the second electrode, and the silicon carbide layer. The intermediate region includes a gate electrode pad, a first connection layer electrically connecting the first electrode and a part of the first wiring layer, a second connection layer electrically connecting the first electrode and another part of the first wiring layer, a second wiring layer electrically connected to the gate electrode pad and the gate electrode, and the silicon carbide layer.

Semiconductor device

A semiconductor device of embodiments includes: an element region including a transistor, a first diode, and a first contact portion; a termination region surrounding the element region and including a second contact portion; and an intermediate region provided between the element region and the termination region and not including the transistor, the first diode, the first contact portion, and the second contact portion. The element region includes a first electrode, a second electrode, a gate electrode, a silicon carbide layer, and a gate insulating layer. The termination region includes a first wiring layer electrically connected to the first electrode, the second electrode, and the silicon carbide layer. The intermediate region includes the silicon carbide layer. The width of the intermediate region in a direction from the element region to the termination region is equal to or more than twice the thickness of the silicon carbide layer.

A semiconductor device of embodiments includes: a first electrode; a second electrode; a gate electrode extending in a first direction; and a SiC layer. The SiC layer includes: a first conductive type first SiC region having a first region, a second region facing the gate electrode, and a third region in contact with the first electrode; a second conductive type second SiC region between the second region and the third region; a second conductive type third SiC region, the second region interposed between the second SiC region and the third SiC region; a second conductive type fourth SiC region, the third region interposed between the second SiC region and the fourth SiC region; a first conductive type fifth SiC region; a second conductive type sixth SiC region between the first region and the second SiC region; and a second conductive type seventh SiC region between the first region and the second SiC region and distant from the sixth SiC region in the first direction.

Growing community of inventors

Himeji Hyogo, Japan

Takahiro Ogata