Samsung Electronics Co., Ltd.

Takahiro Nomiyama

Ikhwan Kim

Youngho Jung

Ji-seon Paek

Jeongkwang Lee

Jaeyeol Han

Yus Ko

Dongsu Kim

Dong-su Kim

Jiseon Paek

Yongsik Youn

Younghwan Choo

Sung Woo Moon

Seung-chan Park

Dong-Jin Keum

Suho Lee

Yongmin Kim

Hoang Quoc Duong

Jong-beom Baek

Ik-hwan Kim

Jae-Yeol Han

Ilyoung Sohn

Minsoo Cho

Jong Beom Baek

A low dropout (LDO) regulator is configured to generate first to nth output voltages, where n is a natural number greater than or equal to 2, and each of the first to nth output voltages corresponds to a reference voltage. The LDO regulator includes an amplifier configured to generate an error voltage based on the reference voltage and a first output voltage of the first to nth output voltages, a trimming control circuit configured to generate first to (n−1)th trimming signals based on the first to nth output voltages, and an output buffer circuit configured to generate the first to nth output voltages based on the error voltage and the first to (n−1)th trimming signals.

Low dropout regulator, clock generating circuit, and memory device

Embodiments of a switching regulator include a single inductor or two inductors connecting an input circuit and a multi-output end circuit that may drive different loads at different respective voltage levels. The input circuit may include a plurality of input switches, and may boost an input voltage or a ground voltage via operation in one of a plurality of selected modes such as a buck mode, a boost mode and a boost-buck mode, to thereby provide an applied voltage to the one or more inductors. Each selected mode may be based on a target voltage for one of a plurality of unit output ends (output load driving sections) in the multi-output end circuit. Output voltages may be monitored and on-times of switches controlled in the multi-output end circuit to maintain the output voltages in respective target ranges.

Switching regulator circuit

A voltage dividing capacitor circuit includes a first capacitor voltage divider and a second capacitor voltage divider. The first capacitor voltage divider is connected to a second voltage node, the first capacitor voltage divider includes a first flying capacitor and a plurality of first switches, the second voltage node coupled to a second load capacitor, the plurality of first switches connected in series between a first voltage node and a ground node, the first voltage node coupled to a first load capacitor, and the ground node coupled to a ground voltage. The second capacitor voltage divider is connected between the first voltage node and the second voltage node, and includes a second flying capacitor and a plurality of second switches, the plurality of second switches connected in series between the first voltage node and the second voltage node.

Voltage dividing capacitor circuits, supply modulators and wireless communication devices

A voltage dividing capacitor circuit includes first capacitor through third capacitor dividers and first through fourth load capacitors. The first capacitor divider includes a first flying capacitor and a plurality of first switches connected in series between a first voltage node and a ground node, and is connected to a second voltage node. The second capacitor divider is connected to the first voltage node, the second voltage node, and a first intermediate voltage node. The third capacitor divider is connected to the second voltage node, the ground voltage node, and a second intermediate voltage node. The first through fourth load capacitors are connected in series between the first voltage node and the ground node. The second capacitor divider includes a second flying capacitor and a plurality of second switches connected in series between the first voltage node and the second voltage node.

Voltage dividing capacitor circuits and supply modulators including the same

A regulating circuit including a first direct current (DC)-DC converter configured to apply a first supply voltage to a first node in a first mode and apply the first supply voltage to a second node in a second mode, a first low drop output (LDO) regulator connected to the first node, the first LDO regulator configured to provide an output voltage to an output node by regulating the first supply voltage of the first node, and a second LDO regulator connected to the first node, the second LDO regulator configured to provide an auxiliary current to the first node in the second mode may be provided.

Regulating circuit including a plurality of low drop out regulators and method of operating the same

A symbol power tracking amplification system including: a modem to generate data and symbol tracking signals; a symbol tracking modulator including a control circuit, first and second voltage supply circuits and a switch circuit, the control circuit generates first and second voltage level control signals in response to the symbol tracking signal, the first voltage supply circuit generates a first output voltage in response to the first voltage level control signal, the second voltage supply circuit generates a second output voltage in response to the second voltage level control signal and the switch circuit outputs the first or second output voltages as a supply voltage in response to a switch control signal; an RF block to generate an RF signal based on the data signal from the modem; and a power amplifier to adjust a power level of the RF signal based on the supply voltage.

Symbol power tracking amplification system and a wireless communication device including the same

According to some example embodiments, an apparatus includes a buck-boost converter, a first buck converter connected at an output terminal of the buck-boost converter, a second buck converter connected at the output terminal of the buck-boost converter, a first LA including a first supply voltage input connected to the output terminal of the buck-boost converter, and an output terminal connected to an output terminal of the first buck converter, where the first LA is configured to provide a first modulated supply voltage to a first PA of a first transmitter, and a second LA including a second supply voltage input connected to the output terminal of the buck-boost converter, and an output terminal connected to an output terminal of the second buck converter, where the second LA is configured to provide a second modulated supply voltage to a second PA of a second transmitter.

Supply modulator for power amplifier

A switching regulator including a first converting stage and a second converting stage may be provided. The first converting stage may include a first output capacitor connected between a first output node and ground, the first converting stage configured to receive a first input voltage and provide an output voltage by adjusting a level of the output voltage based on a first dynamic voltage scaling (DVS) rate relating to a first load condition of a processing circuit. The second converting stage may include a second output capacitor connected between a second output node and the ground, the second converting stage configured to receive a second input voltage and provide the output voltage by adjusting the level of the output voltage based on a second DVS rate relating to a second load condition of the processing circuit, which is heavier than the first load condition of the processing circuit.

Switching regulator and electronic device including the same

Provided are a semiconductor device and a method of operating the same. A semiconductor device may include a comparator which compares a first voltage with a rectified voltage and provides a second voltage in accordance with the comparison. A timer circuit may operate a timer according to the second voltage and output a third voltage in correspondence with an operation time of the timer. A driver may drive a transistor with a fourth voltage generated by the driver according to the third voltage. A calibration circuit may generate a timer calibration signal based on the second voltage and the fourth voltage. The timer calibration signal may be provided to the timer circuit and used to calibrate the operation time of the timer. More efficient rectification, with reduced occurrence of reverse current, may thereby be realized.

Semiconductor device and method of operating the same

A switching regulator configured to generate a level-controlled output voltage from an input voltage, the switching regulator includes an inductor, an output capacitor configured to generate the level-controlled output voltage based on a current flowing through the inductor, at least two flying capacitors, and a plurality of switches configured to form electrical connections when the switching regulator operates in a first operating mode to, alternately charge each of the at least two flying capacitors using the input voltage, and provide a first boosted voltage to the inductor using a charged flying capacitor among the at least two flying capacitors.

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Seoul, South Korea

Takahiro Nomiyama