Fujitsu Corporation

Fujitsu Semiconductor Limited

Fujitsu Microelectronics Limited

Takahiro Kimura

Kenichi Watanabe

Nobuyuki Hayashi

Teru Nakanishi

Masanobu Ikeda

Takeshi Shioga

Hideki Kitada

Hiroki Uchida

Tsuyoshi Kanki

Tetsuya Shirasu

Seiji Hibino

Susumu Ogata

Chihiro Uchibori

Hideaki Nagaoka

A cooling apparatus includes: an evaporator in which a coolant is housed and that evaporates the coolant; a condenser that condenses the coolant evaporated by the evaporator; a pathway section that includes a vapor path and a liquid path each placing the inside of the evaporator and the inside of the condenser in communication with each other, and that circulates the coolant between the evaporator and the condenser; a valve that is provided to at least one path out of the vapor path or the liquid path; and a pressure regulation section that increases an opening amount of the valve according to an increase in pressure inside the evaporator.

Cooling apparatus and electronic device

A cooling system, includes: an evaporator configured to take heat from a heat source by latent heat of evaporation of liquid; an aspirator configured to suck vapor generated in the evaporator and decompress an inside of the evaporator; a liquid supplying unit configured to supply liquid to the aspirator and the evaporator; and a gas mixing unit configured to mix gas into the liquid to be supplied from the liquid supplying unit to the evaporator.

Cooling device and electronic device system

A cooling system includes: an evaporator; a condenser; a feed pipe including a feed pipe body configured to couple an opening portion within the evaporator and the condenser, at least a portion of the feed pipe body in a longitudinal direction having an inner cross-sectional area smaller than an inner cross-sectional area of the opening portion; a return pipe configured to couple the condenser and the evaporator; and a bypass pipe configured to couple the evaporator and the feed pipe body.

Cooling system and electronic device

A semiconductor package includes a substrate with a first surface on which a semiconductor device is mounted and a second surface opposite to the first surface, and a loop heat pipe including an evaporator and attached to the second surface of the substrate, wherein the substrate has a groove structure in the second surface, the groove structure being in contact with a porous wick provided in the evaporator.

Semiconductor package, cooling mechanism and method for manufacturing semiconductor package

There is provided a loop heat pipe which includes an evaporator that internally includes at least one wick built, a condenser, a liquid pipe and a vapor pipe that connect the evaporator and the condenser to each other, and a heat dispersion cavity that is formed inside the evaporator, and disperses a vapor, wherein the wick includes, a first wick that is porous, a second wick that is porous, the second wick being inserted into the first wick from the liquid pipe side and including a pore size larger than the first wick, and a vapor channel that is defined between the first wick and the second wick. The vapor channel is connected at an end on the liquid pipe side to the heat dispersion cavity.

Loop heat pipe, and electronic apparatus including loop heat pipe

A semiconductor device that includes multiple logic circuit cells having respective logic circuits formed therein and multiple interconnects connected to the corresponding logic circuit cells. At least one of the interconnects has an opening formed therein so as to have an opening ratio different from one or more of the opening ratios of the remaining interconnects.

Semiconductor device, method of manufacturing same, and apparatus for designing same

In a pad forming region electrically connecting an element forming region to the outside, in which a low dielectric constant insulating film is formed in association with in the element forming region, a Cu film serving as a via formed in the low dielectric constant insulating film in the pad forming region is disposed in higher density than that of a Cu film serving as a via in the element forming region. Hereby, when an internal stress occurs, the stress is prevented from disproportionately concentrating on the via, and deterioration of a function of a wiring caused thereby can be avoided.

Semiconductor device and method for manufacturing the same

A method for manufacturing a semiconductor device, including depositing an interconnect material including Cu or Cu alloy over an insulating film, and polishing the interconnect material by CMP with a polishing liquid, wherein the oxidation-reduction potential (ORP) of the polishing liquid is controlled so as to be in the range of 400 mV to 700 mV vs. Ag/AgCl.

Method for manufacturing semiconductor device and polisher used in the method for manufacturing semiconductor device

A semiconductor device is disclosed that includes multiple logic circuit cells having respective logic circuits formed therein; and multiple interconnects connected to the corresponding logic circuit cells. At least one of the interconnects has an opening formed therein so as to have an opening ratio different from one or more of the opening ratios of the remaining interconnects.

A semiconductor device manufacturing method comprises the steps of forming a metal film () on an organic interlayer insulating film () formed over a semiconductor substrate to get a metal diffusion preventing metal carbide film () on a boundary between the organic interlayer insulating film () and the metal film (), and leaving the metal carbide film () on the organic interlayer insulating film () by removing selectively the metal film () from the metal carbide film ().

Growing community of inventors

Kawasaki, Japan

Takahiro Kimura