Samsung Electronics Co., Ltd.

Takahiko Inada

Mooyoung Kim

Yunhong Kim

Dongwook Won

Hyunjin Jeon

Jaeheum Baek

An image sensor including a row driver configured to provide, at a first time, a control signal to first pixels in a first group having n consecutive odd horizontal lines, provide, at a second time, the control signal to pixels in a second group having n consecutive even horizontal lines, and provide, at a third time, the control signal to pixels in a third group having n consecutive odd horizontal lines, and having a first horizontal line next to a last horizontal line of the first group, wherein each of the n horizontal lines of the first group is separated by an at least three-row interval from a corresponding one of the n horizontal lines of the second group, and a time interval between the first time point and the second time point is equal to a time interval between the second time point and the third time point.

Image sensor and method of operating the image sensor

An image sensor includes a pixel array including a first pixel and a second pixel which are connected to a same column line, the first pixel including 2N sub-pixels sharing a first floating diffusion node and the second pixel including 2N sub-pixels sharing a second floating diffusion node, wherein N is a positive integer greater than or equal to two, a timing generator configured to change a reset order and a readout order of 4N sub-pixels included in the first pixel and the second pixel, according to an exposure time setting value, and output a row address according to the changed orders, and a row driver configured to drive the pixel array based on the row address.

Image sensor and electronic device comprising the same

An image sensor includes a pixel array; a logic circuit configured to convert an image signal generated from the pixel array during a first period into image data; and a memory. The image data may be written in the memory during a second period, of which at least a portion overlaps the first period. The logic circuit may write dummy data in the memory during a third period overlapping the first period and not overlapping the second period.

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Hwaseong-si, South Korea

Takahiko Inada