Renesas Electronics Corporation

Renesas Technology Corp.

Takafumi Betsui

Motoo Suwa

Norihiko Sugita

Shigezumi Matsui

Naoto Taoka

Yoshiharu Fukushima

Satoshi Imasu

Takahiro Sugimura

Jun Yamada

Atsushi Kuroda

Masato Suzuki

Shuuichi Kariyazaki

Tadashi Kameyama

Kazuyuki Sakata

Hikaru Ikegami

Tetsushi Hada

Yoichi Isozumi

Nobuyuki Morikoshi

Yoshikazu Tanaka

Takashi Abematsu

A semiconductor device includes a semiconductor package having a differential signal terminal pair, and a wiring board. The wiring board includes a first and a second signal transmission line and a reference potential plane. The first and the second signal transmission line is formed in a first conductive layer and connected to the differential signal terminal pair. The reference potential plane includes a conductive pattern formed in a different conductive layer from the first conductive layer. The conductive pattern includes a first and a second region overlapped with the first and the second signal transmission line in plan view, respectively. The conductive pattern has a plurality of openings in the first and the second region. An area of a first conductive portion of the reference potential plane in the first region becomes equal to an area of a second conductive portion of the reference potential plane in the second region.

Semiconductor device on wiring board having reference potential planes with openings

Semiconductor device has a regulator circuit having an even number of switching regulators that generate output power from an input power supply and a power management IC that controls the output potential generated by the switching regulator. semiconductor device is characterized in that a group of half of the even number of switching regulators is arranged on a first surface of semiconductor device system board, and a group of switching regulators, which is the remaining half, is arranged on a second surface that is in front-back relation with the first surface. This semiconductor device reduces semiconductor device board-area (pattern-resource).

Semiconductor device and power management IC

A semiconductor apparatus includes a mounting board, a system on chip (SOC) package and a memory package which are provided on the mounting board. The SOC package includes a semiconductor chip and a package substrate on which the semiconductor chip is mounted. The semiconductor apparatus further includes a signal wiring line through which a signal between the semiconductor chip and the memory package is transmitted, being provided on the package substrate and in the mounting board and a measurement terminal connected to the signal wiring line on main surface of the package substrate.

Semiconductor apparatus and semiconductor device

A microcomputer provided on a rectangular semiconductor board has memory interface circuits. The memory interface circuits are separately disposed in such positions as to extend along the peripheries of the semiconductor board on both sides from one corner as a reference position. In this case, limitations to size reduction imposed on the semiconductor board can be reduced compared with a semiconductor board having memory interface circuits only on one side. Respective partial circuits on each of the separated memory interface circuits have equal data units associated with data and data strobe signals. Thus, the microcomputer has simplified line design on a mother board and on a module board.

Data processing device

To provide an electronic device capable of improving a signal quality, the electronic device includes a semiconductor memory device, a semiconductor device configured to access data stored in the semiconductor memory device, and a wiring substrate on which the semiconductor memory device and the semiconductor device are mounted. The wiring substrate includes first and second data wirings electrically connecting the semiconductor device with each first and second data terminal of the semiconductor memory device through first and second wiring layers. The first wiring layer is a wiring layer arranged closer to the semiconductor device than the second wiring layer, and the first data terminal is located farther from the semiconductor device than the second data terminal.

Synchronous dynamic random access memory (SDRAM) and memory controller device mounted in single system in package (SIP)

An electronic device includes a first wiring substrate and a semiconductor device mounted on the first wiring substrate. A plurality of first semiconductor chips and a second semiconductor chip which controls each of the plurality of first semiconductor chips are mounted side by side on a second wiring substrate of the semiconductor device. Further, the plurality of first semiconductor chips are mounted between a first substrate side of the wiring substrate and an extension line of a first chip side of the second semiconductor chip. Furthermore, the first wiring substrate includes a first power line which supplies a first power potential to each of the plurality of first semiconductor chips and a second power line which supplies a second power potential to the second semiconductor chip and has a width larger than that of the first power line. Also, the second power line intersects the first substrate side of the second wiring substrate and extends from a side of the first substrate side of the second wiring substrate toward the second semiconductor chip when seen in a plan view.

Electronic device and semiconductor device

The object is to suppress rupture of the soldering balls when an atmosphere varying from a high temperature to a low temperature is repeated. A semiconductor device includes a semiconductor integrated circuit and a substrate. The semiconductor integrated circuit is, for example, a semiconductor chip. The coefficient of thermal expansion is different between the semiconductor integrated circuit and the substrate. The substrate includes a plurality of soldering balls on the opposite surface to the surface where the semiconductor integrated circuit is mounted. The substrate does not have the soldering balls at a position corresponding to at least one side of the fringe of the semiconductor integrated circuit.

Semiconductor device, system in package, and system in package for vehicle

Provided is a semiconductor device which can be prevented from increasing in size. The semiconductor device includes a semiconductor chip having a first main surface and a second main surface opposite to the first main surface and a wiring substrate over which the semiconductor chip is mounted such that the second main surface of the semiconductor chip faces a first main surface of the wiring substrate. Over the second main surface of the semiconductor chip, a plurality of first terminals connected with a first circuit and a plurality of second terminals connected with a second circuit are arranged. An arrangement pattern of the plurality of first terminals and an arrangement pattern of the plurality of second terminals include the same arrangement pattern. In a region of the wiring substrate where the first circuit is close to the second circuit when viewed from the first main surface of the semiconductor chip, a voltage line which supplies a power supply voltage to the first circuit is formed. In a region of the wiring substrate where the second circuit is close to the first circuit, a voltage line which supplies the power supply voltage to the second circuit is formed.

Semiconductor device

A semiconductor integrated circuit device includes a component built-in board in which at least a first core layer on which a first electronic component is mounted, a second core layer on which a second electronic component is mounted, an adhesive layer arranged between the first core layer and the second core layer, and wiring layers are stacked; a third electronic component mounted in a first core layer side of the component built-in board and electrically connected to the at least one of the first and second electronic components through the wiring layers; and an external connection terminal formed in a second core layer side of the component built-in board and electrically connected to at least one of the first and second electronic components.

Semiconductor integrated circuit device, printed board and manufacturing method of the semiconductor integrated circuit device

The semiconductor device has a semiconductor chip having a first-signal-output circuit operating at a first-power-supply voltage, a second-signal-output circuit operating at a second power supply voltage, and a plurality of bump electrodes; and a wiring board including a first main surface facing the main surface of the semiconductor chip, a second main surface opposite to the first main surface with a wiring layer therebetween, first external terminals on the first main surface, and second ones on the second main surface; the former being mounted on the latter to couple the bump electrodes to the first external terminals. When viewed from the second main surface, second external terminals to be supplied with the first signal and the second signal are arranged closer to the semiconductor chip than second external terminals to be supplied with the first power supply voltage and the second power supply voltage.

An electronic device includes a first wiring substrate and a semiconductor device mounted on the first wiring substrate. The semiconductor device includes a second wiring substrate having a plurality of terminals, a plurality of first semiconductor chips mounted on the second wiring substrate, and a second semiconductor chip mounted on the second wiring substrate. The first wiring substrate includes a first power supply line and a second power supply line supplying a plurality of power supply potentials, whose types are different from each other, to the second semiconductor chip. In a plan view, the second power supply line is arranged to cross over a first substrate side of the second wiring substrate and a first chip side of the second semiconductor chip. In a plan view, the first power supply line is arranged to pass between the second power supply line and a part of the plurality of first semiconductor chips and to extend toward a region overlapping with the second semiconductor chip. An area of a region of the first power supply line, the region overlapping with the second power supply line in a thickness direction, is smaller than an area of another region of the first power supply line, the another region not overlapping with the second power supply line.

Electronic device

A semiconductor integrated circuit chip, in which multi-core processors are integrated, is usually mounted over an organic wiring board by FC bonding to form a BGA package by being integrated with the substrate. In such a structure, power consumption is increased, and hence the power supplied only from a peripheral portion of the chip is insufficient, so that a power supply pad is also provided in the chip central portion. However, because of an increase in the wiring associated with the integration of a plurality of CPU cores, etc., there occurs a portion between the peripheral portion and the central portion of the chip, where a power supply pad cannot be arranged. According to the outline of the present application, in a semiconductor integrated circuit device such as a BGA, etc., in which a semiconductor chip is mounted over an interposer, such as a multilayer organic wiring board, in a face-up manner, a first group of metal through electrodes, which are provided in the semiconductor chip to supply a power supply potential to a core circuit, etc., and a first metal land over the interposer are interconnected by a first conductive adhesive member film.

Growing community of inventors

Tokyo, Japan

Takafumi Betsui