Fanuc Corporation

Takaaki Komatsu

Minoru Nakamura

Kazunari Aoyama

Yoshito Miyazaki

Yasumichi Sakoda

Kouji Hada

Kunitaka Komaki

Akira Koizumi

A glitch removal circuit removes glitch noise contained in a Power-good signal and a Power-on Reset signal, and includes: a first glitch removal unit that operates according to a first clock signal, and removes glitch noise from a Power-good signal; and a second glitch removal unit that operates according to a second clock signal, and removes glitch noise from a Power-on Reset signal, in which the first glitch removal unit is configured so as to be initialized according to an output signal of the second glitch removal unit, and the second glitch removal unit is configured so as to be initialized according to an output signal of the first glitch removal unit.

Glitch removal circuit and electronic device

An electronic device according to the present disclosure is an electronic device having a function of removing glitches contained in a signal, and includes a glitch removal circuit which removes glitches from an inputted signal, and a count unit which counts a number of times removing glitches.

Electronic device and noise removal system

To provide a multi-rank SDRAM control method and an SDRAM controller that prevent performance degradation and minimize increase in parts count even in a multi-rank SDRAM configuration. A multi-rank SDRAM control method controls a multi-rank SDRAM formed by connecting data buses of multiple SDRAM devices. In each of the multiple SDRAM devices, only a data mask signal for a rank of the SDRAM device, which is to be accessed, is negated, whereby an access to the rank is executed.

Multi-rank SDRAM control method and SDRAM controller

To allow restoration of a backup target device more properly. An automatic backup device comprises: a history information acquisition unit that acquires history information containing a time of a change in setting on a backup target device and a content of the change associated with each other; a restoration request acquisition unit that acquires a restoration request containing a time intended for restoration of the backup target device; a restoration information generation unit that generates restoration information for restoring the backup target device based on the time contained in the restoration request by using the history information acquired by the history information acquisition unit; and a restoration information transmission unit that transmits the restoration information generated by the restoration information generation unit to the backup target device.

Automatic backup device, automatic backup method, and recording medium

A numerical control device includes a multicore CPU for outputting a position command value of a servomotor, an ASIC including a servo controller, which outputs a current command value to an amplifier for driving the servomotor, and another processor, and a DSP for reading the position command value and controlling the servomotor such that the servomotor moves to a position indicated by the position command value. The CPU and the ASIC are connected through a plurality of serial interfaces.

Numerical control device having improved servo control performance

A numerical control device includes a CPU for outputting a position command value of a servomotor; an IC including a servo controller for outputting a current command value to an amplifier for driving the servomotor, and an I/O unit for inputting and outputting an external signal; a DSP for reading the position command value and performing control so as to move the servomotor to a position indicated by the position command value; and an inter-device communication path between the CPU and the IC. The IC includes an internal bus connected to a communication interface connected to the inter-device communication path, and the I/O unit; and an internal communication path for directly transmitting a signal between the servo controller and the I/O unit without passing through the internal bus.

Numerical control device for realizing high-speed input and output of external signal in servo controller

From an error information containing a content of a correctable error that has occurred in a controller of a failure prediction system and an ID of the controller and manufacturing information of a machine to which the controller is attached, a failure of a controller belonging to a group of controllers in which such an error as indicated in the error information has not occurred yet is predicted.

Failure prediction system of controller

A master unit and a plurality of slave units are connected by way of a communication path. The master unit sends to the slave units timing signals generated by its own cycle signal generator by way of a communication path. The slave units determine the cycle difference and the phase difference between a timing signal generated by its own cycle signal generator and the timing signal sent from the master unit and, in accordance therewith, determine a cycle adjustment amount. The cycle signal generators of the slave units adjust the timing signal cycle based on the cycle adjustment amount.

Control system

A transmission path delay is set in a shift setting register. A slave unit generates a PRE_ITP signal in response to a timing signal (ITP signal) issued by a master unit. The phase difference between this PRE_ITP signal and the ITP signal unique to the slave unit is loaded into a period modification counter. A timer corrects a reference value, outputs position/speed control period signals (SYN signals) and counts down the period modification counter with these SYN signals until the period modification counter reaches zero. Furthermore, the ITP signal unique to the slave unit is outputted every time a predetermined number of the SYN signals are outputted.

Growing community of inventors

Yamanashi, Japan

Takaaki Komatsu