Fujitsu Corporation

Fujitsu Vlsi Limited

Takaaki Ido

Hiroko Murakami

Kenzi Yamada

Koji Okada

Tomonobu Miyata

Matsuju Yoshida

This invention provides a clock generator which is capable of improving modulation accuracy without accompanying an increase in consumption current by steady current when spectrum spread of a clock signal is executed. The phase balanced voltage Vf to be inputted to the voltage control oscillator (VCO)is modulated within a dead band region in which no difference signals Pr, Pr are outputted from the charge pump circuitwhen a difference in oscillation frequency between an output clock signal fo and a reference clock signal fr is detected. Consequently, the output clock signal fo is changed within the range of a lock frequency in a PLL circuit, so as to execute the spectrum spread of the output clock signal fo while maintaining the lock state of the oscillation frequency in the PLL circuit.

Spread-spectrum clock generator

A semiconductor memory device is disclosed for use in writing and reading data. The memory device is provided with a memory cell array including a plurality of word lines, a plurality of bit lines, and a plurality of memory cells connected to each of the word lines and bit lines, respectively. The memory device is provided with a precharger which precharges to set the potential of each bit line to a given level before the data on the memory cells can be read out onto the bit lines. The memory device is responsive to an address signal, and a controller for controlling the precharger. The controller activates the precharger so that all the bit lines are precharged when a previously selected word line changes following the change of the address signal.

Semiconductor memory device with reduced consumption power for bit line

A first selector outputs either an output of an ALU (arithmetic logic unit) or a first clipped value to a first bus. A temporary register holds the output signal of the ALU, and a second selector outputs either the output signal of the temporary register or a second clipped value. A controller causes an operation result regarding lower data of first and second operands to be stored in the temporary register in a first cycle of the ALU when each of the first and second operands consists of 2n bits while the ALU operates on n bits per cycle thereof. When an operation result regarding upper data of the first and second operands overflows in a second cycle of the ALU, the controller causes the first and second selectors to output the first and second clipped values. When the operation result regarding the upper data does not overflow, the controller causes the first and second selector to respectively output the output signals of the ALU and the temporary register.

Computing unit and digital signal processor using the same

A semiconductor memory device comprises a memory cell array including a plurality of adjacently disposed first and second memory cell pairs, with bit lines defined in the memory cell array. Switching elements are interposed between the memory cells and the bit lines. Word lines are connected to the switching elements, for selecting one of the memory cells by operating the switching elements, so that data is written on and is read out from selected memory cell through the bit lines. Each bit line is arranged between the first and second memory cells, so that each bit line serves as a common bit line to the first and second memory cells. A buffer circuit is connected to each word line and the buffer circuit transmits the first, second and third select signals each having a different voltage level from each other. The switching elements are respectively connected to the first and second memory cells. The switching element connected to the first memory cell is turned on in response to the first select signal, the switching element connected to the second memory cell is turned on in response to the second select signal, and the switching elements respectively connected to the first and second memory cells is turned off in response to the third select signal.

Growing community of inventors

Kasugai, Japan

Takaaki Ido