Samsung Display Co., Ltd.

Samsung Displayco., Ltd.

Tak-Young Lee

Yun-Mo Chung

Jin-Wook Seo

Byoung-Keon Park

Jong-Ryuk Park

Ki-Yong Lee

Dong-Hyun Lee

Kil-Won Lee

Seung-Kyu Park

Min-Jae Jeong

Byung-Soo So

Yong-Duck Son

Jae-Wan Jung

Yong-Sung Park

Ilhun Seo

Daewoo Lee

Miyeon Cho

BoYong Chung

Bo-Yong Chung

Young-In Hwang

Yong-Jae Kim

Sang-uk Lim

Hae-Yeon Lee

Joosun Yoon

Chul-Kyu Kang

Hyuk Hwan Kim

Heung-Yeol Na

Jae-Wook Kang

Hojin Yoon

Minseong Yi

Doo-young Lee

Jae-Hoon Lee

Kang Moon Jo

Young-Jin Cho

Hai-Jung In

Deok-Young Choi

Sung Jae Moon

Yong Sung Park

Yong Ho Yang

An Su Lee

Deuk Jong Kim

Jonghee Kim

Byungseok Choi

Min-Hyuk Choi

Jin-Gon Oh

Dong-Beom Lee

Ji Hye Kong

Ji-Hye Kong

Won Kyu Lee

Bogyeong Kim

Hyun Tae Kim

Ki-Young Lee

Kii-Won Lee

Doo-Young Lee

A display device includes a display panel and a gate driver. The gate driver includes an N-th stage (where N is a natural number) configured to output an N-th scan gate signal and output an N-th sensing gate signal. The N-th stage includes a compensator, a sixth transistor including a control electrode connected to a first node, and a ninth transistor including a control electrode connected to the first node. In a variable frequency mode, the compensator outputs a second signal to the first node in response to a first signal, and the sixth transistor does not output the N-th scan gate signal when the ninth transistor outputs the N-th sensing gate signal based on the sensing clock signal, the voltage of the first node, and the voltage of the second node.

Display device

A gate driving circuit includes a stage which outputs a scan signal based on a scan clock signal, a voltage of a first node, and a voltage of a second node, and outputs a sensing signal based on a sensing clock signal, a voltage of the first node, and a voltage of the second node. The stage includes a second sensing portion including transistors electrically connected in series and a first pull-up control portion including transistors electrically connected in series, the transistors including control electrodes electrically connected to each other. A first intermediate node between the transistors of the second sensing portion is separated from a second intermediate node between the transistors of the first pull-up control portion.

Gate driving circuit and display device including the same

A display device includes a substrate, a first conductive layer disposed on the substrate, a second conductive layer disposed on the first conductive layer and a third conductive layer disposed on the second conductive layer. The first conductive layer includes a data line extending in a first direction. The second conductive layer includes a first scan line extending in a second direction intersecting the first direction, and a second scan line spaced apart from the first scan line and extending in the second direction. The third conductive layer includes a first driving voltage line extending in the second direction, a first common voltage line spaced apart from the first driving voltage line and extending in the second direction, and a pixel electrode disposed between the first driving voltage line and the first common voltage line in a plan view.

A display device includes: a substrate; first, second, and third data lines extending in a first direction on the substrate and disposed to be adjacent along a second direction crossing the first direction; a semiconductor layer disposed on the first, second, and third data lines; a first insulating layer disposed on the semiconductor layer; first, second, and third lower storage electrodes disposed on the first insulating layer and arranged to be adjacent along the first direction; a second insulating layer disposed on the first, second, and third lower storage electrodes; a first scan line extending in the second direction on the second insulating layer; a first pixel connected to the first scan line and the first data line; a second pixel connected to the first scan line and the second data line; and a third pixel connected to the first scan line and the third data line.

A unit pixel includes a circuit structure, first and second wiring patterns, an interlayer insulating layer, a planarization layer, and a light emission structure. The first wiring pattern disposed on the circuit structure has a first bump structure. The interlayer insulating layer covers the circuit structure and the first wiring pattern. The second wiring pattern disposed on the interlayer insulating layer overlaps the first wiring pattern and has a second bump structure. The planarization layer covers the interlayer insulating layer and the second wiring pattern and includes a via-hole exposing at least a portion of the second wiring pattern. The light emission structure contacts the second wiring pattern through the via-hole. The first and second wiring patterns and the interlayer insulating layer form a capacitor, the light emission structure includes an OLED, and the capacitor is directly connected to an anode of the OLED.

Unit pixel and organic light emitting display device including the same

An organic light emitting display apparatus includes a base layer, a circuit element layer, a display element layer, an encapsulation layer, and a sealing member. The circuit element layer includes a power supply line on the base layer and an auxiliary power supply pattern on and connected to the power supply line. The display element layer includes a first electrode, a light emitting layer, and a second electrode, which are sequentially stacked on the circuit element layer. The second electrode is electrically connected to the auxiliary power supply pattern. The sealing member is between the circuit element layer and the encapsulation layer to overlap with the auxiliary power supply pattern when viewed in a plan view.

Organic light emitting display apparatus

A display panel includes: a display substrate having a display area, and a pad area disposed on at least one side of thereof; and a plurality of pad groups arranged on the pad area in a first direction and including: a first pad group having a plurality of first pads, at least some of the plurality of first pads have a first inclination with respect to a reference line extending in a second direction different from the first direction, and the plurality of first pads being spaced from each other at a first pitch; and a second pad group having a plurality of second pads, at least some of the plurality of second pads having a different second inclination with respect to the reference line, and the plurality of second pads being spaced from each other at a second pitch different from the first pitch.

Display panel and display device including the same

A thin film transistor substrate may include a base substrate, a semiconductor member, a gate electrode, a first insulation layer, and a source/drain electrode. The semiconductor member may overlap the base substrate. The gate electrode may overlap the semiconductor member and may be insulated from the semiconductor member. The first insulation layer may be positioned on the gate electrode and may include a first contact hole. The source/drain electrode may include a first discharge hole, may be electrically connected to the semiconductor member, and may be at least partially positioned inside the first contact hole. The first discharge hole may partially expose the semiconductor member.

Thin film transistor substrate and related display device

A unit pixel includes a circuit structure, first and second wiring patterns, an interlayer insulating layer, a planarization layer, and a light emission structure. The first wiring pattern disposed on the circuit structure has a first bump structure. The interlayer insulating layer covers the circuit structure and the first wiring pattern. The second wiring pattern disposed on the interlayer insulating layer overlaps the first wiring pattern and has a second bump structure. The planarization layer covers the interlayer insulating layer and the second wiring pattern and includes a via-hole exposing at least a portion of be second wiring pattern. The light emission structure contacts the second wiring pattern through the via-hole. The first and second wiring patterns and the interlayer insulating layer form a capacitor, the light emission structure includes an OLED, and the capacitor is directly connected to an anode of the OLED.

An organic light emitting display device includes a pixel unit and a driving unit. The pixel unit includes at least one pixel and the driving unit is configured to drive the pixel unit. The at least one pixel includes a first switching transistor, a second switching transistor, a third switching transistor, a fourth switching transistor, a first capacitor, a second capacitor, an organic light emitting diode, a third capacitor, and a driving transistor.

Organic light emitting display device with increased luminance uniformity

An organic light emitting diode display including: a substrate; a plurality of first signal lines on the substrate extending in a first direction; a first insulating layer covering the substrate and the first signal lines; a plurality of auxiliary signal lines formed on the first insulating layer and overlapping the first signal lines; a second insulating layer covering the auxiliary signal lines; a plurality of first signal line connecting members formed on the second insulating layer while overlapping parts of the auxiliary signal lines; a plurality of second signal lines crossing the first signal lines; a plurality of switching transistors and a plurality of driving transistors connected with the first signal lines and the second signal lines; and a plurality of organic light emitting diodes electrically connected to the driving transistors, where the first signal line connecting members connect the first signal lines to the auxiliary signal lines.

Organic light emitting diode display and manufacturing method thereof

A pixel includes an organic light emitting diode, a first driver and a second driver. The second driver controls an amount of current supplied from a first power source to the organic light emitting diode, corresponding to a previous data signal. The first driver stores a current data signal supplied from a data line and supplies the previous data signal to the second driver. In the pixel, the second driver includes a sixth transistor coupled between an initialization power source and a first node coupled to a gate electrode of a first transistor, the sixth transistor being configured to turn on when a first control signal is supplied; and a seventh transistor coupled between the first power source and a second node commonly coupled to the first and second drivers, the seventh transistor being configured to turn on when the first control signal is supplied.

Pixel and organic light emitting display using the same

A degradation compensating pixel circuit includes: an organic light emitting diode (OLED); a driving circuit including a first capacitor and a first transistor, the first capacitor being configured to be charged in response to a data signal and a scan signal, the first transistor being configured to drive the OLED according to a first voltage between first and second terminals of the first capacitor, the first terminal of the first capacitor being configured to receive a supply voltage, the second terminal of the first capacitor being coupled to a gate terminal of the first transistor; and a degradation compensating circuit coupled to a source terminal of the first transistor and the gate terminal of the first transistor, the degradation compensating circuit being configured to change the first voltage according to a first current of the first transistor.

Degradation compensating pixel circuit and organic light emitting diode display device including the same

A method of forming a polycrystalline silicon layer includes forming a first amorphous silicon layer and forming a second amorphous silicon layer such that the first amorphous silicon layer and the second amorphous silicon layer have different film qualities from each other, and crystallizing the first amorphous silicon layer and the second amorphous silicon layer using a metal catalyst to form a first polycrystalline silicon layer and a second polycrystalline silicon layer. A thin film transistor includes the polycrystalline silicon layer formed by the method and an organic light emitting device includes the thin film transistor.

Thin film transistor and organic light emitting device including polycrystalline silicon layer

There is provided a pixel having an improved display quality. The pixel includes an OLED, a first transistor including a first electrode coupled to a data line and a second electrode coupled to an anode electrode of the OLED, and configured to control a current supplied to the OLED based on a voltage applied to a first node; a second transistor coupled between the data line and a second node; a third transistor coupled between the second node and a first power line for supplying reference power; and a first capacitor coupled between the first node and the second node.

Pixel and organic light emitting display device using the same

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Yongin, South Korea

Tak-Young Lee