Tokyo Ohka Kogyo Co., Ltd.

Taisuke Shiroyama

Toru Takahashi

Hiroyuki Obiya

Kenji Tazawa

Yoshikazu Takiguchi

An improved process for producing a multilayer wiring board that has a plurality of conductor patterns and an interlevel dielectric layer on at least one surface of a substrate, with via holes or trench-like channels being provided at specified sites of said interlevel dielectric layer to establish an electrical interconnection between said conductor patterns, wherein prior to the provision of said via holes or trench-like channels, a coating having resistance to sandblasting is formed in a pattern over the interlevel dielectric layer and then sandblasting is performed to remove the interlevel dielectric layer in selected areas to form the via holes or trench-like channels and, thereafter, the coating having resistance to sandblasting is removed, followed by the provision of a conductive layer.

Growing community of inventors

Kanagawa-ken, Japan

Taisuke Shiroyama