Kabushiki Kaisha Toshiba

Taihei Nakada

Kazuhiko Itaya

Hiroshi Yamada

Kazuhide Abe

Ryota Suzuki

Toshihiko Nagano

Junichiro Suzuki

Yuusuke Yamashita

Tsuyoshi Kumamoto

Yoshiaki Satake

Tadahiro Sasaki

Masahiro Tanabe

Yasuaki Wada

Shinji Tamai

Hiroyuki Uwamichi

According to one embodiment, an antenna apparatus includes a plurality of amplifier circuits, a common drain control circuit, a gate control circuits, and an antenna controller. The common drain control circuit constitutes a control circuit common to the plurality of amplifier circuits, and controls a drain voltage of a field-effect transistor included in each of the amplifier circuits. The gate control circuits are provided for each amplifier circuit, and controls a gate voltage of the field-effect transistor. The antenna controller controls the common drain control circuit and the gate control circuits, and selectively operates the plurality of amplifier circuits by controlling an output of the gate voltage prior to the drain voltage.

Antenna apparatus and array antenna apparatus for radar

A semiconductor package of an embodiment includes: a semiconductor chip having a signal input terminal and a signal output terminal; and a cap unit that is formed on the semiconductor chip. The cap unit includes a concave portion forming a hollow structure between the semiconductor chip and the cap unit, a first through electrode electrically connected to the signal input terminal, and a second through electrode electrically connected to the signal output terminal. Of the inner side surfaces of the concave portion, a first inner side surface and a second inner side surface facing each other are not parallel to each other.

Semiconductor package having a cap unit with concave portion and method of manufacturing the same

A semiconductor package according to embodiments includes: a semiconductor chip including a front electrode on a front surface thereof and a back electrode on a back surface thereof; a front-side cap portion including an air gap in a portion between the semiconductor chip and the front-side cap portion and a front-side penetrating electrode, and is positioned to face the front surface of the semiconductor chip; a back-side cap portion bonded with a first cap portion to hermetically seal the semiconductor chip, includes an air gap at least in a portion between the semiconductor chip and the back-side cap portion and a back-side penetrating electrode, and is positioned to face the back surface of the semiconductor chip; a front-side connecting portion which electrically connects the front electrode and the front-side penetrating electrode; and a back-side connecting portion which electrically connects the back electrode and the back-side penetrating electrode.

Semiconductor package and method of manufacturing the same

In a transceiver module, a micro wave analog signal interface is provided between the transceiver module and an antenna element, and all the signal interfaces except a power supply are digital signal interfaces, and the interfaces are configured as one chip on a semiconductor. An internal reference signal generates a local signal serving as a reference by multiplying a high frequency digital clock signal supplied from the outside, and simultaneously generates a reference signal capable of synchronous operation by a lower frequency digital clock signal supplied from the outside, in the clock generator. The frequency of the generated reference local signal can be varied by controlling the inner multiplication number or the frequency of the higher frequency digital clock signal supplied from the outside. In addition, both transmission and reception can be executed with an arbitrary frequency by varying the frequency of the transmission waveform generator.

Array antenna apparatus and micro wave transceiver module

A multilayer high-frequency circuit board includes a signal line, ground layers, and an interlayer circuit. A signal line where a high-frequency signal flows is formed in the signal line layer. The ground layers are laminated on both sides of the signal line layer, each of which is grounded. The interlayer circuit is provided in the signal line layer and includes a ground connecting portion connected to the ground layers and a signal line connecting portion connected to the signal line. One of the signal line connecting portion and the ground connecting portion surrounds an outer periphery of the other of the signal line connecting portion and the ground connecting portion concentrically with the one being separated from the outer periphery of the other along the signal line layer. An inner periphery of the one and the outer periphery of the other have a similar shape excluding a complete circle.

Multilayer high-frequency circuit board

When an excitation signal is generated from an exciter due to an activation signal generated from a radar control device and is distributed to supply to each antenna sub-module, a combination reception signal is transmitted to a receiver from each antenna sub-module. The receiver takes in the combination reception signal obtained by each sub-module in response to an instruction from the radar control device, a frequency converter converts the combination reception signal into a prescribed frequency band, and a distributed aperture combination circuit performs a beam combination in accordance with a distributed aperture combination algorithm. In this way, a radar apparatus, which is equivalent to an active phased array radar of a large aperture and with high performance, is achieved.

Radar apparatus and method for forming reception beam of the same

A high frequency multilayer integrated circuit is provided with: a multilayer board including n earth conductor layers (n: integer of two or more than two) and (n-1) dielectric layers each arranged between adjacent earth conductor layers; a first high frequency circuit disposed in one of the most outside earth conductor layers of the multilayer board; a first power-supply/control circuit disposed in this most outside earth conductor layer; a second high frequency circuit disposed in at least one of the dielectric layers and connected to the first high frequency circuit in the multilayer board; a second power-supply/control circuit disposed in another one of the most outside earth conductor layers of the multilayer board; and a third power-supply/control circuit disposed in at least one of the dielectric layers at a portion at which the second high frequency circuit does not exist, the third power-supply/control circuit being connected to the first and second power-supply/control circuits.

High frequency multilayer integrated circuit

In a first step, a conductive layer a1 is formed on a three-dimensionally curved upper surface of a main mold. In a second step, a peripheral surface mold is attached to the outer peripheral surface of the main mold, and a liquid dielectric of an age hardening type is cast onto the conductor layer, and hardened. In a third step, the peripheral surface mold is detached from the main mold, and an unnecessary portion of the hardened dielectric is cut to thereby form a dielectric layer. In a fourth step, another conductor layer is formed on the dielectric layer. A method comprising these steps enables a dielectric board with a voluntary three-dimensionally curved surface to be manufactured with high accuracy.

Growing community of inventors

Kawasaki, Japan

Taihei Nakada