Omnivision Technologies, Inc.

Tai-Ching Shyu

Datong Chen

Xinping James He

Jun Liu

The present invention is directed to a single chip color CMOS image sensor with a novel two or more line reading structure which is compatible with MOS fabrication technology. The invention allows the simultaneous reading of line signals from two adjacent rows of pixels so that combinations of signals from pixels in adjacent rows may be obtained without the use of an external delay line device. The sensor includes a pixel array having superimposed thereon a color filter pattern and a two or more line reading structure. The reading structure includes sets of storage capacitors on which the pixel signals are stored, and a means for reading the signals from the capacitors in such a way that signals from pixels in adjacent rows may be combined. The reading structure is external to the pixel array but may still be fabricated on the same CMOS chip as the pixel array.

Single chip color CMOS image sensor with two or more line reading structure

The present invention is directed to a single-chip color CMOS image sensor with a novel two or more line reading structure which is compatible with MOS fabrication technology. The invention allows the simultaneous reading of line signals from two rows of pixels so that combinations of signals from pixels in different rows may be obtained without the use of an external delay line device. The sensor includes a pixel array having superimposed thereon a color filter pattern and a two or more line reading structure. The reading structure includes sets of storage capacitors on which the pixel signals are stored, and a means for reading the signals from the capacitors in such a way that signals from pixels in different rows may be combined. The reading structure is external to the pixel array but may still be fabricated on the same CMOS chip as the pixel array. By using a high-sensitivity interlace color structure that allows complementary sets of every other row to be read during alternating even and odd fields, the sensitivity of the device as a whole can be effectively doubled.

Single-chip color CMOS image sensor with two or more line reading

The present invention is directed to a single chip color MOS image sensor with a novel two-line reading structure which is compatible with MOS fabrication technology. The invention allows the simultaneous reading of line signals from two adjacent rows of pixels so that combinations of signals from pixels in adjacent rows may be obtained without the use of an external delay line device. The sensor includes a pixel array having superimposed thereon an improved color filter pattern and a two-line reading structure which may be doubled so as to provide four line signals. The reading structure includes sets of storage capacitors on which the pixel signals are stored, and a means for reading the signals from the capacitors in such a way that signals from pixels in adjacent rows may be combined. The approximate ratios of the colors in the improved color filter pattern are one-half green, one-fourth yellow, and one-fourth cyan.

Single chip color MOS image sensor with two line reading structure and

A charge amplifier with DC offset cancelling for use in a pixel element of an MOS image sensor is disclosed. The charge amplifier can be manufactured using a standard CMOS single polycrystalline process, making it much more cost effective than prior art designs. The charge amplifier includes an operational amplifier, a source capacitor, a series capacitor, and a feedback capacitor. The source capacitor holds the input signal. The output of the operational amplifier provides the output signal. Switches control the routing of the signal flow from the source capacitor, the series capacitor, and the feedback capacitor.

Charge amplifier for Mos imaging array and method of making same

A charge amplifier with DC offset canceling for use in a pixel element of an MOS image sensor is disclosed. The charge amplifier can be manufactured using a standard CMOS single polycrystalline process, making it much more cost effective than prior art designs. The charge amplifier includes an operational amplifier, a source capacitor, a series capacitor, and a feedback capacitor. The source capacitor holds the input signal. The output of the operational amplifier provides the output signal. Switches control the routing of the signal flow from the source capacitor, the series capacitor, and the feedback capacitor.

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Cupertino, CA, United States of America

Tai-Ching Shyu