Lg Display Co., Ltd.

TaeWoong Moon

Yeonkyung Kim

Yewon Hong

JungHyun Lee

Yeonwoo Shin

JunHyeon Bae

Junghyun Lee

Jinyeong Kim

Sungpil Ryu

ChongHun Park

Heeyoung Chae

YongHo Jang

Juhoon Jang

YongSeok Park

Meeran Park

YounGyoung Chang

IlKi Jung

Uyhyun Choi

One or more embodiments of the present disclosure relate to a display device and a gate driving circuit. There is further provided with a synchronization transistor controlled according to a voltage of a Q node of a m-th scan driver (e.g., a second scan driver) and controlling an electrical connection between an output terminal of the n-th light emitting driver and a clock input terminal of the m-th scan driver, so that the rising characteristic and/or the falling characteristic of the light emission signal which is a type of the gate signal can be improved, thereby improving a threshold voltage compensation performance of the driving transistor and the image quality.

Display device and gate driving circuit having a synchronization transistor

A display apparatus comprises a display panel on which a plurality of pixels are displayed, a plurality of signal lines to which a signal required to drive the display panel is supplied, and an electrostatic discharge circuit connected between each of the plurality of signal lines and the electrostatic discharge line. The electrostatic discharge circuit includes first and second current paths between the signal line and the electrostatic discharge line, a first electrostatic discharge circuit connected to the first current path, including a plurality of first thin film transistors having a first gate electrode connected to the second current path and a second gate electrode connected to the first current path, and a second electrostatic discharge circuit connected to the second current path, including at least one second thin film transistor having a first gate electrode connected to the first current path and a second gate electrode connected to the first current path.

Display apparatus

A display device having a gate driver, which may reduce a leakage current of a TFT and power consumption, is disclosed. Each stage of the gate driver comprises an output portion including a pull-up transistor outputting a corresponding clock of a plurality of clocks as a gate signal in response to control of a Q node, and a pull-down transistor outputting a first gate-off voltage as an off-voltage of a gate signal in response to control of a QB node; a controller charging and discharging the Q node and charging and discharging the QB node to be in an opposite state of the Q node; and a back bias circuit having a back bias node capacitance-coupled with the Q node and generating a second gate-off voltage lower than the first gate-off voltage to apply the second gate-off voltage to the back bias node for an off-period of the Q node, wherein the back bias circuit may apply the back gate bias voltage to light shielding layers of some transistors, which are turned off for the off-period of the Q node, among transistors constituting the output portion and the controller, through the back bias node, thereby reducing or minimizing a leakage current of the corresponding transistors.

Display device having gate driver

A display device having a gate driver, which may reduce a leakage current of a TFT and power consumption, is disclosed. Each stage of the gate driver comprises an output portion including a pull-up transistor outputting a corresponding clock of a plurality of clocks as a gate signal in response to control of a Q node, and a pull-down transistor outputting a gate-off voltage as an off-voltage of a gate signal in response to control of a QB node; a controller charging and discharging the Q node and charging and discharging the QB node to be in an opposite state of the Q node; and a back bias circuit having a back bias node capacitance-coupled with the Q node and generating a back gate bias voltage to apply the back gate bias voltage to the back bias node for an off-period of the Q node, wherein the back bias circuit may apply the back gate bias voltage to light shielding layers of some transistors, which are turned off for the off-period of the Q node, among transistors constituting the output portion and the controller, through the back bias node, thereby reducing or minimizing a leakage current of the corresponding transistors.

The present disclosure relates to a gate driving circuit and a display device using the circuit. A gate driving circuit according to an aspect of the present disclosure comprises a Q node controller, a QB node controller, and an output unit generating a pulse-type output signal by controlling charging and discharging of an output terminal according to the voltages of the Q node and the QB node, and the QB node controller controls the voltage of the QB node in an alternating manner during a non-scan period in which the Q node controller outputs a low level voltage for the Q node.

Gate driving circuit and display device using the same

The present disclosure relates to a display, and more particularly, to a display including a multiplexer capable of implementing a high-voltage driving, a low-consumption power driving, and a high-speed switching. A display including a multiplexer according to the present disclosure includes a data driver for outputting image data; a multiplexer connected with the data driver through a driving line; a display panel connected with the multiplexer through a data line; and a gate driver connected with the display panel through a gate line, and the multiplexer includes a first TFT controlled by the charging and the discharging of a first mux line; and a second TFT controlled by the charging and the discharging of a second mux line.

Display including multiplexer and control method thereof

A demultiplexer for sequentially outputting a data signal to a plurality of data lines disposed in a display panel can include a first switch connected to a first control node, the first switch being configured to electrically connect a first channel with a first data line among the plurality of data lines; a second switch connected to a second control node, the first switch being configured to electrically connect the first channel with a second data line among the plurality of data lines; a third switch connected to a third control node, the third switch being configured to electrically connect a second channel with a third data line among the plurality of data lines; and a fourth switch connected to a fourth control node, the fourth switch being configured to electrically connect the second channel with a fourth data line among the plurality of data lines, in which the first control node and the third control node are configured to receive a single first control signal, and be electrically disconnected from each other at a point in time, the second control node and the fourth control node are configured to receive a single second control signal, and be electrically disconnected from each other at a point in time, and the first control node and the third control node have different voltage conditions than the second control node and the fourth control node.

Display device capable of data output based on demultiplexing

A display apparatus is disclosed, which comprises a demultiplexing circuit portion for sequentially supplying data signals supplied from a data driving circuit to at least two data lines, the demultiplexing circuit portion including a switching portion for sequentially supplying the data signals to at least two data lines based on a voltage of a control line, a voltage controller for controlling the voltage of the control line in response to a time-division control signal and an auxiliary signal partially overlapped with the time-division control signal, and a voltage discharge portion for discharging the voltage of the control line in response to the time-division control signal. Therefore, an off current capable of being transferred to an organic light emitting diode may be prevented from occurring, a bezel area may be minimized, and an image of high resolution of a display panel may be embodied.

Disclosed is a display apparatus including a gate driving circuit, which stably holds an output signal during a touch sensing period. The display apparatus includes a display panel including a display area including a plurality of gate lines, a plurality of data lines, and a plurality of touch sensors, a gate driving circuit dividing the display area into a plurality of horizontal blocks and driving gate lines of a horizontal block by units of horizontal blocks at every display period in one frame, and a touch driving circuit sensing a touch through touch sensors of the horizontal block by units of horizontal blocks at every touch sensing period in the one frame. The gate driving circuit includes a plurality of driving stage groups each including a plurality of driving stages supplying a scan pulse to gate lines included in a corresponding horizontal block at every display period and a plurality of holding stage groups each including at least one holding stage supplying a carry signal to a rear driving stage group according to a voltage of a first control node and a voltage of a second control node based on first and second node control powers and an output signal supplied from a front driving stage group, the plurality of holding stages being disposed between the plurality of driving stage groups. Each of the first and second node control powers includes an alternating current (AC) voltage.

A gate drive circuit and a display device are provided. The gate drive circuit comprises: a first stage that outputs a first gate pulse at a first output terminal by increasing a voltage at the first output terminal when a first Q node is charged in response to receiving a first carry signal at a first start terminal, and decreasing the voltage at the first output terminal when a first QB node is charged; and a second stage that outputs a second gate pulse at a second output terminal and outputs a second carry signal at a third output terminal by increasing voltages at the second and third output terminals when a second Q node is charged in response to receiving the first carry signal at a second start terminal, and decreasing the voltages at the second and third output terminals when a second QB node is charged.

Gate drive circuit and display device using the same

A gate driver and a display device having an in-cell touch sensor using the gate driver are disclosed. The gate driver includes a shift register configured to sequentially supply gate pulses to gate lines of a display panel. The shift register includes an (N&#x2212;1)th stage, where N is a positive integer equal to or greater than 2, configured to output an (N&#x2212;1)th gate pulse, an Nth stage configured to output an Nth gate pulse, and a hold circuit configured to hold an output voltage of the (N&#x2212;1)th stage during a predetermined time and supply the output voltage to the Nth stage.

Gate driver and display device having in-cell touch sensor using the same

A stereoscopic image display and a method for manufacturing the same are provided. The stereoscopic image display comprises: a thin film transistor array substrate; a color filter substrate facing the thin film transistor array substrate, and comprising black matrix; first black stripes formed on the color filter substrate, and formed at positions corresponding to the black matrix; and a patterned retarder film formed on the first black stripes.

Stereoscopic image display and method for manufacturing the same

The present invention relates to a liquid crystal display (LCD) device. More particularly, the present invention relates to an LCD device including a thin film transistor (TFT) compensation circuit in an LCD device which implements a driving circuit by using an oxide TFT, the LCD device capable of compensating for degraded characteristics of a TFT due to threshold voltage shift. As the compensation circuit including a dummy TFT is formed on a non-active area of the LC panel, the degree of threshold voltage shift of the DT due to a DC voltage can be sensed. Based on the sensed result, a threshold voltage of a second TFT can be compensated. This can reduce lowering of a device characteristic.

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Paju-si, South Korea

TaeWoong Moon