Samsung Electronics Co., Ltd.

Lg Display Co., Ltd.

Lg Electronics Inc.

Yonsei University

I3system Corp.

Taewook Kim

Jaehoon Choi

Jooyoung Choi

Jongho Lee

Donghyun Kim

Taewan Kim

Michael Choi

Taegon Kim

JungHun Lee

HanSeok Kim

Junghyeon Kim

Hyeon Deuk Hwang

Gunhee Han

JaeWoo Lee

Jongill Hong

Myungsoo Park

Byungjae Lee

Byungho Kim

Han Joo Chung

Yoonsu Kim

Sayoon Kang

Jeongjoon Oh

Hyunwoong Lim

Seunghan Park

Seongjin Shin

Hyungyu Kim

Heonjin Choi

Hwasub Oh

Nohbyung Park

Seungkee Sihn

Jungyoon Yi

Seongsoo Park

Jooik Chung

Hyeonwoo Lee

Kwangho Ko

Seongyeol Pyo

Sangseok Hong

Sooho Bae

Jaebeom Lee

Sangkwon Kim

A frequency multiplier includes a capacitor circuit having a plurality of capacitors therein, and is responsive to a differential input signal applied to an inverting input node and a non-inverting input node thereof. A frequency multiplication circuit (FMC) is provided, which has a plurality of transistors therein. The FMC is configured to receive components of the differential input signal passing through the plurality of capacitors, and multiply a frequency of the components of the differential input signal. A plurality of inductor loads are provided, which are connected to an inverting output node and a non-inverting output node of the FMC, and are configured to convert a current signal generated by the FMC into a voltage signal.

Frequency multiplier circuits having cross-coupled capacitors therein which support frequency multiplication

Disclosed is a display device. The display device of the present disclosure may include: a display panel; a plate disposed at a rear of the display panel, and coupled to the display panel; a frame disposed at a rear of the plate; and a mount plate disposed at a rear of the frame, wherein the plate may include a fixing part protruding rearward from a rear surface of the plate, passing through the frame, and coupled to the mount plate.

Display device

A display device comprises a pixel circuit including a driving element having a gate electrode connected to a first node and a source electrode connected to a second node, a light emitting element connected to the second node, a first switch element that connects a data line and the first node, and a second switch element that connects a reference voltage line and the second node; a gate driver that supplies a scan signal to the gate line; and a sensing circuit that senses a voltage of the reference voltage line during a sensing period, wherein during an initialization period the scan signal is higher than the sensing data voltage, during the sensing period, the scan signal is higher than the first ground voltage and lower than the sensing data voltage, during the sensing period, a voltage of the second node is stored in a sensing capacitor.

A semiconductor package includes a package substrate; a plurality of lower chip structures on the package substrate; an upper chip structure on the plurality of lower chip structures and covering portions of upper surfaces of the plurality of lower chip structures; a non-conductive adhesive layer on a lower surface of the upper chip structure and receiving upper portions of the plurality of lower chip structures; and a molded member on the plurality of lower chip structures and the upper chip structure.

Semiconductor packages with chips partially embedded in adhesive

A semiconductor package includes a connection structure having first and second surfaces opposing each other and including a first redistribution layer; a semiconductor chip disposed on the first surface of the connection structure and including connection pads connected to the first redistribution layer; an encapsulant disposed on the first surface of the connection structure and encapsulating the semiconductor chip; and a second redistribution layer disposed on the encapsulant; a wiring structure connecting the first and second redistribution layers to each other and extending in a stacking direction; and a heat dissipation element disposed on at least a portion of the second surface of the connection structure.

Semiconductor package

Provided is a display apparatus including: a display module; a housing accommodating the display module; a transparent substrate disposed on a front surface of the display module and installed in the housing; a transmitter disposed on one end of the transparent substrate and generating light; a receiver installed on the other end of the transparent substrate to face the transmitter in a first direction, and receiving the light emitted from the transmitter; and a receiver installed on the other end of the transparent substrate to face the transmitter in a first direction, and receiving the light emitted from the transmitter; and a control unit driving the display module, and determining whether the transparent substrate is damaged based on a signal received from the receiver.

Display apparatus capable of detecting damage to a housing accommodating a display

A semiconductor package includes a connection structure having first and second surfaces opposing each other and including a redistribution layer. A semiconductor chip is disposed on the first surface of the connection structure and has connection pads connected to the redistribution layer. An encapsulant is disposed on the first surface of the connection structure and covers the semiconductor chip. A support pattern is disposed on a portion of an upper surface of the encapsulant. A heat dissipation bonding material has a portion embedded in the encapsulant in a region overlapping the semiconductor chip and extends to the upper surface of the encapsulant so as to cover the support pattern. A heat dissipation element is bonded to the upper surface of the encapsulant by the heat dissipation bonding material.

Data drivers and organic light emitting display devices having data drivers are provided in which a number of amplifiers for driving a display panel is reduced. A data driver includes an analog-to-digital converter, first and second amplifier circuits, a first switch coupled to an output of the first amplifier circuit, and a second switch and a third switch coupled to an output of the second amplifier circuit. The first switch is configured to selectively couple the output of the first amplifier circuit to a first data line and to second data line of a display panel. The second switch is configured to selectively couple the output of the second amplifier circuit to the second data line and to the analog-to-digital converter. The third switch is configured to selectively couple the output of the second amplifier circuit to a sensing line of the display panel.

Data driver and organic light emitting display device including the same

This embodiments herein relate to an image processing method and a stereoscopic image display device that provide high readability of a text area when implementing both 2D images and 3D images. The embodiments described herein convert the left(right)-eye image data corresponding to the left(right)-eye coordinates into a mean of the left(right)-eye image data corresponding to the left(right)-eye coordinates and the left(right)-eye image data adjacent to thereof on the other line. Therefore, the embodiments described herein may compensate for the left(right)-eye conversion data which are not arranged on a 3D format. As a result, the embodiments described herein may improve readability of the text area in the 3D mode. Also, the embodiments described herein may improve readability on the text area by applying a sharpness filter to the original 2D image corresponding to the 2D coordinates which is detected as the text area in the 2D mode.

Image processing method, image processor and stereoscopic image display device using the image processor

Provided is a neural device including at least one nano-wire. The neural device includes a nano-wire formed on a base formed on a first surface of a substrate, and an electrode pad formed on a second surface different from the first surface of the substrate and configured to output an electrical signal gained from a neural fiber through the nano-wire or apply a signal for an electric stimulus to the nano-wire. Therefore, it is possible to prevent the nano-wire from becoming embedded in an encapsulation and maximize a contact between the nano-wire and a nerve.

Neural device having via-hole connection and using at least one nano-wire

An easily-upgradable computer includes a CPU board removably attached to a main board. The CPU board includes a CPU, a jump setting circuit which includes a plurality of factory-set jump switches, and a pair of first connectors electrically connected to the CPU and jump setting circuit. The main board includes a plurality of conventional peripheral devices, drivers and controllers, a clock generator, and a pair of second connectors removably coupled and electrically connected to the pair of first connectors. A wiring pattern of the CPU board electrically connects address, data, control signal, and power supply terminals of the CPU to the pair of first connectors, and a wiring pattern of the main board electrically connects the plurality of peripheral devices, drivers, and controllers, and the clock generator to the pair of second connectors. The jump switches on the CPU board are factory-set in accordance with the operational specifications of the CPU, and control the clock generator on the main board.

Easily-upgradable computer and CPU board therefor

Growing community of inventors

Seoul, South Korea

Taewook Kim