Samsung Electronics Co., Ltd.

Taesoon Duyeon Kwon

Jeongyun Lee

GeumJung Seong

Kyungseok Min

A-reum Ji

Bora Lim

HyunHo Jung

Seungsoo Hong

Disclosed is a semiconductor device. The semiconductor device includes a substrate, channel semiconductor patterns vertically stacked and spaced apart from each other on the substrate, a gate electrode running across the channel semiconductor patterns, source/drain regions at opposite sides of the gate electrode, the source/drain regions being connected to the channel semiconductor patterns, and air gaps between the substrate and bottom surfaces of the source/drain regions so that the bottom surfaces of the source/drain regions do not contact the substrate.

Semiconductor devices

A semiconductor device can include a first active pattern on a substrate, the first active pattern including a plurality of first active regions that protrude from the substrate. A second active pattern can be on the substrate including a plurality of second active regions that protrude from the substrate. A first gate electrode can include an upper portion that extends over the first active pattern at a first height and include a recessed portion that extends over the first active pattern at a second height that is lower than the first height of the first gate electrode. A second gate electrode can include an upper portion that extends over the second active pattern at a first height and include a recessed portion that extends over the second active pattern at a second height that is lower than the first height of the second gate electrode. An insulation pattern can be located between, and directly adjacent to, the recessed portion of the first gate electrode and the recessed portion of the second gate electrode, the insulation pattern electrically isolating the first and second gate electrodes from one another.

Semiconductor devices including recessed gate electrode portions

Growing community of inventors

Suwon-si, South Korea

Taesoon Duyeon Kwon