Lg Display Co., Ltd.

Taehwi Kim

JungChul Kim

JuhnSuk Yoo

MinJi Kang

Hyunseok Hong

Chungwan Oh

Soonsung Ahn

According to an aspect of the present disclosure, there is provided a gate driver and a display device. The display device includes: a display panel having a plurality of sub-pixels defined thereon, the sub-pixels being connected to a plurality of scan lines; and a gate driver comprising a plurality of stages for supplying first and second scan signals to each of the plurality of scan lines. Each of the plurality of stages may include: a first output unit for outputting the first scan signal; a second output unit for outputting the second scan signal; a logic unit connected to the first output unit and the second output unit; a low-clock signal line connected to the logic unit; and a high-clock signal line connected to the second output unit. Therefore, a first and a second scan signal can be output from a single stage, so that the structure of the gate driver can become simpler.

Gate driver and display device including the same

Provided is an organic light emitting display device. The organic light emitting display device includes a substrate including an active area and an inactive area at least partially surrounding the active area, an organic light emitting element in the active area, and a conductive line disposed to have a vertically uneven shape in the inactive area and provided to transmit power to the organic light emitting element. The conductive line covers an area including at least one or more grooves in which an inorganic layer is dug.

Organic light emitting display device

A pixel circuit and a display device including the same are disclosed. The pixel circuit includes: a driving transistor which includes a first electrode connected to a first node, a gate electrode connected to a second node, and a second electrode connected to a third node, and supplies a driving current to a light emitting device; a first transistor that is electrically connected between the first node and the second node; a second transistor that is electrically connected between the first node and a data voltage; a third transistor that is electrically connected between the first node and a power supply line that supplies a high potential voltage; and a storage capacitor that includes a first electrode connected to the high potential voltage and a second electrode connected to the second node.

Pixel circuit for forming slim bezel and display device including the same

A display device is disclosed by the present disclosure. The display device includes: a display panel having a plurality of sub-pixels, the sub-pixels being connected to a plurality of scan lines and a plurality of data lines; and a gate driver for supplying a scan signal at a high level to the plurality of scan lines. The gate driver may include: a first gate driver for outputting a carry signal at a low level; a second gate driver for outputting the scan signal at the high level based on the carry signal; a first clock signal line connected to the first and the second gate driver; and a second clock signal line connected to the first and the second gate driver. Accordingly, the gate driver can generate a high-level scan signal based on the low-level carry signal from the first gate driver.

Display device

Pixel circuit for forming a slim bezel

A display apparatus can include a display area including pixel rows, the display area having an outer periphery including a curved section and a straight section; a non-display area surrounding the display area, the non-display area having an outer periphery including a curved section and a straight section; a gate driver disposed in the non-display area, the gate driver including gate blocks corresponding to the pixel rows; and a low potential power line disposed between the gate driver and the outer periphery of the non-display area, in which each of the gate blocks includes a plurality of stages.

Display apparatus

A display apparatus includes a substrate having a display area for displaying an image and a non-display area surrounding the display area; a first clock line portion in the non-display area, the first clock line portion having a plurality of gate shift clock lines; a second clock line portion in the non-display area between the first clock line portion and the display area, the second clock line portion having a gate start signal line; and a gate driving built-in circuit in the non-display area between the first clock line portion and the second clock line portion, and connected with the plurality of gate shift clock lines and the gate start signal line.

Growing community of inventors

Busan, South Korea

Taehwi Kim